Semiconductor Device With Dielectric Thickness Variation For Timing Error Correction
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Solution Overview
Problem
Solid-State Aging Devices (SSAD) are prone to errors due to physical manipulation, such as temperature changes, which affect the aging property and result in timing errors in battery-less electronic timers.
Innovation Solution
A semiconductor device comprising two SSAD units with transistors having different dielectric layer thicknesses, where a common word line is used to detect and correct threshold voltage shifts caused by physical manipulation, ensuring accurate timekeeping by adjusting the control voltage to maintain time within a predetermined error tolerance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If SSAD units are used for battery-less electronic timers, then the device can operate without a battery, but physical manipulation such as temperature changes causes timing errors
Solution Approach 1:
The patent applies parameter changes by utilizing transistors with different dielectric layer thicknesses (first thickness and second thickness) to create different aging characteristics. By changing the physical parameter of dielectric thickness, the system creates multiple SSAD units with distinct threshold voltage drift behaviors, enabling detection and correction of manipulation-induced errors through comparison.
2Reliability
If transistors with different dielectric layer thicknesses are used, then physical manipulation errors can be detected and corrected, but device complexity increases
Solution Approach 1:
The patent segments the SSAD functionality into multiple independent transistor units (first transistor and second transistor) with different dielectric layer thicknesses. Each transistor operates as an independent time cell, and by segmenting the aging detection function across multiple units with different characteristics, the system can compare their behaviors to detect manipulation without requiring complex external monitoring systems.
Solution Approach 2:
The control gate diffusion region serves multiple functions: it controls the operation of individual transistors during normal timing operations and simultaneously serves as a shared control mechanism for detecting and correcting manipulation errors across different SSAD units. This multi-functionality reduces the need for separate dedicated control circuits.
3Ease of operation
If a common word line is used to control multiple transistors, then control is simplified, but the ability to individually address and correct each transistor's threshold voltage shift is reduced
Solution Approach 1:
The patent applies local quality by giving each transistor unit a distinct physical characteristic (different dielectric layer thicknesses) while sharing a common control mechanism. The first transistor has a first dielectric layer with a first thickness, and the second transistor has a second dielectric layer with a second thickness different from the first. This local differentiation enables precise measurement of individual threshold voltage shifts even under common control, as each unit responds differently to the same control gate voltage due to its unique dielectric properties.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively detects and corrects physical manipulation-induced errors in SSAD units, ensuring reliable and accurate timekeeping by stabilizing the discrepancy between read times from transistors with different dielectric layer thicknesses, thus maintaining precise timing.
Implementation Method 1
detect and correct threshold voltage shifts caused by physical manipulation
Data Source
AI summary
A semiconductor device includes a first SSAD unit and a second SSAD unit. The first SSAD unit has at least one first transistor with a first dielectric layer between a first substrate and a first floating gate. The second SSAD unit has at least one second transistor with a second dielectric layer between a second substrate and a second floating gate. The second dielectric layer is thicker than the first dielectric layer.