Semiconductor Device Fabrication with Diffusion Prevention Layer
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Solution Overview
Problem
Semiconductor devices face challenges in maintaining reliability due to metal atom diffusion during the annealing process, which can lead to transistor malfunction and reduced performance, especially in applying appropriate stress to channel regions for NMOS and PMOS transistors.
Innovation Solution
A method of fabricating semiconductor devices involves forming a diffusion prevention layer and a pre-silicide layer with specific materials on a substrate, followed by a metal layer, where the diffusion prevention layer prevents metal atoms from diffusing into the substrate, and the pre-silicide layer applies tensile or compressive stress to the channel regions, resulting in a monocrystalline silicide layer that enhances transistor performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a metal layer is formed and annealing is performed to create silicide, then the silicide layer enhances transistor performance, but metal atoms diffuse into the substrate causing reliability issues
Solution Approach 1:
A diffusion prevention layer is introduced as an intermediary between the substrate and the metal layer. This layer selectively blocks metal atoms from diffusing into the substrate while allowing metal atoms to react with the pre-silicide layer to form the desired silicide structure, thus resolving the contradiction between achieving silicide formation and preventing harmful metal diffusion.
Solution Approach 2:
The structure is segmented into distinct functional layers: the substrate, the diffusion prevention layer, the pre-silicide layer, and the metal layer. This segmentation allows each layer to perform its specific function - the diffusion prevention layer isolates the substrate from metal contamination while the pre-silicide layer enables controlled silicide formation, thereby preventing harmful diffusion while maintaining transistor performance enhancement.
2Speed
If stress is applied to channel regions to improve transistor mobility, then device performance increases, but the fabrication process becomes more complex
Solution Approach 1:
The stress application function is merged with the silicide layer formation process. The pre-silicide layer is deposited with specific crystal orientation and lattice constant differences that inherently generate tensile or compressive stress on the channel region during subsequent annealing. This combines the stress application needed for mobility enhancement with the existing silicide formation工艺流程, avoiding additional complex stress application steps.
Solution Approach 2:
The lattice constant parameters of the pre-silicide layer are carefully selected to differ from the substrate, generating controlled stress fields. By changing the material parameters (lattice constant, crystal orientation) of the pre-silicide layer, the desired tensile or compressive stress is automatically applied to the channel region during thermal processing, achieving performance enhancement through parameter optimization rather than additional process steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach increases the reliability of semiconductor devices by preventing metal diffusion and applying effective stress to channel regions, leading to improved transistor mobility and operation at high speeds.
Implementation Method 1
Metal atoms of the metal layer are diffused to the first pre-silicide layer in the annealing process and the diffusion prevention layer prevents the metal atoms from diffusing to the substrate
Implementation Method 2
Metal atoms of the metal layer are diffused to the first pre-silicide layer in the annealing process
Data Source
AI summary
A method of fabricating a semiconductor device is provided. A plurality of first gate electrode structure is formed on a substrate. A recess is formed in the substrate, wherein the recess is formed between two adjacent first gate electrode structures of the plurality of first gate electrode structure. A diffusion prevention layer includes a first material and is formed on the recess of the substrate. A first pre-silicide layer includes a second material different from the first material and is formed on the diffusion prevention layer. A metal layer is formed on the first pre-silicide layer. The first pre-silicide layer and the metal layer are changed to a first silicide layer by performing an annealing process to the substrate. The diffusion prevention layer prevents metal atoms of the metal layer from diffusing to the substrate, and the first silicide layer comprises a monocrystalline layer.