Semiconductor Impurity Diffusion Stop Layer for Channel Isolation

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Solution Overview

Problem

The scaling down of semiconductor transistors leads to increased impurity diffusion from source and drain regions into the channel, causing variations in carrier mobility and threshold voltage, particularly in p-type MOSFETs, which affects their performance.

Innovation Solution

A method is introduced to form a semiconductor device with an impurity diffusion stop layer, such as SiC or SiGe, that isolates the channel region from the doped source and drain regions, preventing impurity diffusion while allowing charge carrier flow, and a substantially pure silicon channel layer is formed to improve carrier mobility and threshold voltage uniformity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If transistor size is scaled down to increase functional density, then production efficiency is improved and costs are lowered, but impurity diffusion from source and drain regions into the channel region increases, reducing carrier mobility and causing threshold voltage variations

Engineering Contradiction:
Improveproduction efficiencyVSAvoidcarrier mobility uniformity
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The channel region is segmented into multiple sections with different doping concentrations. A first doped region with higher doping concentration is formed adjacent to the source/drain regions, while a second doped region with lower doping concentration is formed in the middle portion of the channel. This segmentation prevents impurity diffusion from source/drain into the channel while maintaining carrier mobility through the selectively doped regions.

Inventive Principle:
Principle #1Segmentation

2Productivity

If transistor size is scaled down, then more transistors can be integrated per chip area, but impurities from source and drain regions diffuse more easily into the channel region, adversely affecting device performance

Engineering Contradiction:
Improvetransistor integration densityVSAvoiddevice performance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

Different regions of the channel are assigned different doping qualities. The first doped region adjacent to source/drain has higher doping concentration to block impurity diffusion, while the second doped region in the channel middle has lower doping concentration to maintain carrier mobility. This local quality differentiation resolves the conflict between integration density and device reliability.

Inventive Principle:
Principle #3Local quality

3Ease of manufacture

If boron is used as dopant in p-type MOSFET source and drain regions, then doping is achieved, but boron's lower atomic weight and longer diffusing length cause increased impurity diffusion into the channel region compared to other dopants

Engineering Contradiction:
Improvedoping processabilityVSAvoidimpurity diffusion
Core Design Contradiction:
Ease of manufactureVSObject-affected harmful factors

Solution Approach 1:

The channel is segmented into a first doped region near source/drain where boron doping is concentrated to create a diffusion barrier, and a second doped region in the middle with reduced boron concentration. This segmentation allows boron to be used for its ease of manufacture while preventing its harmful long-range diffusion into the channel.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The impurity diffusion stop layer effectively blocks impurities from diffusing into the channel, resulting in improved carrier mobility and threshold voltage uniformity, enhancing the performance of semiconductor devices, especially in advanced technology nodes like 20 nanometer or smaller.

Implementation Method 1

an impurity diffusion stop layer formed in a recess of the substrate between the source region and the drain region, wherein the impurity diffusion stop layer covers bottom and sidewalls of the recess

Methodology Applied
Scientific EffectDiffusion barrier: Diffusion Barrier

Data Source

PatentUS9893150B2Structure and method for semiconductor device
Publication Date: 2018.02.13 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US9893150B2 patent drawing
  • US9893150B2 patent drawing
  • US9893150B2 patent drawing

AI summary

A semiconductor device and a method of forming the same are disclosed. The semiconductor device includes a substrate, and a source region and a drain region formed in the substrate. The semiconductor device further includes an impurity diffusion stop layer formed in a recess of the substrate between the source region and the drain region, wherein the impurity diffusion stop layer covers bottom and sidewalls of the recess. The semiconductor device further includes a channel layer formed over the impurity diffusion stop layer and in the recess, and a gate stack formed over the channel layer.