Semiconductor Package Dilatant Layer Thermal Expansion Control
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Solution Overview
Problem
The challenge is to maintain stable and reliable electrical properties of integrated passive devices (IPDs) with reduced thickness, as capacitance decreases with increased thickness due to thermal expansion, making it difficult to control the overall thickness and ensure consistent performance.
Innovation Solution
A semiconductor package design that includes a substrate, an electronic component, and a dilatant layer with a higher coefficient of thermal expansion than the conductive layers, which compresses the dielectric layer to restrict thermal expansion and maintain capacitance, featuring a dilatant layer on the top surface and extending along the lateral surface of the electronic component.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If the thickness of the electronic component is reduced to achieve miniaturization, then the overall device thickness is decreased, but the capacitance becomes more sensitive to thermal expansion causing unstable electrical properties
Solution Approach 1:
The dilatant layer is designed to expand more than the conductive layer when temperature increases, creating a compressive force on the dielectric layer that counteracts the thermal expansion. This preliminary anti-action prevents the capacitance from decreasing due to thermal effects, thereby maintaining stable electrical properties even in thinned electronic components
Solution Approach 2:
The patent changes the physical parameters of the dilatant layer, specifically its coefficient of thermal expansion, to be greater than that of the conductive layer. This parameter change enables the dilatant layer to generate sufficient compressive force to restrict thermal expansion of the dielectric layer, solving the stability issue in thinned components
2Length of moving object
If the thickness of the electronic component is reduced, then miniaturization is achieved, but control over thickness variation due to temperature becomes difficult
Solution Approach 1:
The dilatant layer is configured to expand more than the conductive layer upon temperature increase, generating a compressive force that counteracts thermal expansion of the dielectric layer. This preliminary anti-action mechanism compensates for thickness variations, maintaining precise dimensional control in thinned electronic components across temperature ranges
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively prevents the undesired decrease in capacitance due to thermal expansion, ensuring stable electrical properties and performance even with reduced thickness, by applying compression forces from the dilatant layer to the dielectric layer.
Implementation Method 1
the first dilatant layer has a coefficient of thermal expansion (CTE) greater than a CTE of the second conductive layer
Data Source
AI summary
A semiconductor package includes a substrate, an electronic component and a first dilatant layer. The electronic component is disposed on the substrate. The electronic component has a top surface, a bottom surface opposite to the top surface and a lateral surface extending between the top surface and the bottom surface. The first dilatant layer is disposed on the top surface of the electronic component and extends along the lateral surface of the electronic component.