Semiconductor Diode Dummy Patterns for CMP Uniformity
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Solution Overview
Problem
The semiconductor industry faces challenges in achieving uniformity and preventing divots, structural cracking, and metal residues in diode areas during the chemical mechanical polishing (CMP) process due to loading effects in wide or isolated parts of thin film layers.
Innovation Solution
The formation of dummy patterns at the corners of diodes, using a substrate with first and second isolation structures and a dummy pattern on the second isolation structure, increases pattern density and improves structural uniformity, preventing divots and cracking while avoiding metal residues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If CMP process is applied to remove topographical target of thin film layer, then planar surface is achieved, but divots occur at target thin film surface due to loading effect in wide or isolated areas
Solution Approach 1:
Dummy patterns are formed in advance at corners of diode areas before CMP process. These dummy patterns pre-establish a more uniform pattern density distribution, preventing loading effects during subsequent CMP processing and avoiding divot formation in wide or isolated areas.
Solution Approach 2:
Dummy patterns are strategically placed at specific locations (corners of diode areas) rather than uniformly across the entire wafer. This localized approach addresses the specific problem of non-uniform pattern density in corner regions while minimizing unnecessary additions in other areas.
2Manufacturing precision
If dummy patterns are formed at corners of diodes, then pattern density is increased to prevent divots and improve uniformity, but device complexity increases
Solution Approach 1:
Dummy patterns are placed only at corner regions of diode areas where pattern density non-uniformity occurs, rather than adding patterns across the entire device. This localized approach improves uniformity where needed while minimizing the overall increase in device complexity.
Solution Approach 2:
Instead of adding dummy patterns to all areas of the device, the invention applies them partially only to corner regions where the loading effect and divot formation occur. This partial action is sufficient to resolve the uniformity issue without unnecessarily complicating the entire device structure.
Data Source
AI summary
A semiconductor device includes a substrate, a first isolation structure, a second isolation structure and a dummy pattern. The substrate includes a first part surrounding a second part at a top view. The first isolation structure is disposed between the first part and the second part, to isolate the first part from the second part. The second isolation structure is disposed at at least one corner of the first part. The dummy pattern is disposed on the second isolation structure. The present invention also provides a method of forming said semiconductor device.


