Semiconductor Diode Hole-Trap Structure for Lower Recovery Loss
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Solution Overview
Problem
Existing semiconductor diodes, particularly those using silicon carbide, experience significant recovery loss and growth of stacking faults due to hole injection during forward bias, which cannot be effectively suppressed by existing techniques.
Innovation Solution
A semiconductor device with a semiconductor layer having a p-type semiconductor region and an n-type semiconductor region, where a trap region with a hole trap is formed, creating an energy barrier to suppress hole injection from the p-type semiconductor region into the n-type semiconductor region when forward biased.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a conventional semiconductor diode structure is used, then the device can conduct current during forward bias, but hole injection into the high resistance region causes recovery loss and stacking fault growth
Solution Approach 1:
An n-type intermediary region is introduced between the p-type anode region and the high resistance n-type region. This intermediary region contains trap regions that capture holes, preventing them from reaching the high resistance region. The intermediary region acts as a mediator that blocks harmful hole injection while maintaining electrical connectivity, thereby reducing recovery loss and preventing stacking fault growth without compromising the diode's forward conduction function.
Solution Approach 2:
The intermediary region is not uniformly structured but contains localized trap regions with specific electrical properties. These trap regions are strategically positioned within the n-type intermediary region to selectively capture holes. The local quality variation (presence of trap regions) allows the structure to differentiate between desired electron flow and harmful hole injection, addressing the contradiction by creating a localized functional zone that blocks holes while permitting overall current conduction.
2Loss of energy
If existing techniques are applied to suppress hole injection, then some reduction in recovery loss may be achieved, but stacking fault growth cannot be effectively prevented
Solution Approach 1:
The n-type intermediary region with trap regions serves as a mediator that specifically targets and captures holes before they can cause damage. This intermediary structure provides a dedicated mechanism for hole suppression that existing techniques lack, simultaneously addressing both recovery loss reduction and stacking fault prevention by creating a physical barrier against hole injection into the high resistance region.
Solution Approach 2:
The trap regions within the intermediary region convert the harmful effect of hole injection into a beneficial outcome. Instead of allowing holes to reach the high resistance region and cause recovery loss and stacking faults, the trap regions capture these holes and utilize them to create a localized positive charge that enhances the blocking effect. This transforms the harmful hole carriers into a beneficial mechanism for preventing further hole injection and protecting the high resistance region.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces recovery loss and suppresses the growth of stacking faults by limiting hole injection, thereby maintaining low hole concentration in the high resistance region and preventing a decrease in breakdown voltage.
Implementation Method 1
The n-type semiconductor region has a trap region provided at a position in contact with the p-type semiconductor region. A hole trap is formed in the trap region.
Data Source
AI summary
A semiconductor device includes a first main electrode, a second main electrode, and a semiconductor layer. The semiconductor layer includes a p-type semiconductor region disposed at a position exposed from the upper surface of the semiconductor layer and electrically connected to the second main electrode, and an n-type semiconductor region in contact with the p-type semiconductor region and separated from the second main electrode by the p-type semiconductor region. The n-type semiconductor region has a trap region provided at a position in contact with the p-type semiconductor region, and a hole trap is formed in the trap region.