Semiconductor Diode Structure With MOS Inversion Channel
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing semiconductor diodes struggle to simultaneously achieve low turn-on voltage, high current density, and fast switching speed, which are essential for power semiconductor applications.
Innovation Solution
A semiconductor device structure is introduced, featuring a substrate, an epi layer, a P region, N+ regions, and insulating layers, which form an inversion channel with a metal oxide semiconductor (MOS) structure, reducing turn-on voltage and increasing current density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a conventional PN diode structure is used, then the device can conduct current in one direction, but the turn-on voltage remains high and current density is limited
Solution Approach 1:
The patent introduces a metal oxide semiconductor layer (such as IGZO) between the P region and anode, fundamentally changing the electrical parameters of the device. This layer enables formation of an inversion channel that dramatically reduces turn-on voltage from typical diode levels to near-zero or negative voltages, while simultaneously enabling much higher current density through the low-resistance channel formed at the semiconductor-insulator interface.
Solution Approach 2:
The patent creates a composite structure combining semiconductor materials (P region, epi layer) with metal oxide semiconductor materials (IGZO or similar). This composite architecture leverages the unique properties of metal oxide semiconductors - their ability to form stable inversion channels with low off-state current and low turn-on voltage - to achieve performance unattainable with conventional semiconductor materials alone.
2Speed
If high current density is achieved through structure optimization, then switching speed improves, but turn-on voltage increases
Solution Approach 1:
The metal oxide semiconductor layer fundamentally changes the voltage-current characteristics of the device. By forming an inversion channel with controlled conductivity, it enables fast switching transitions while maintaining near-zero turn-on voltage. The channel conductivity can be rapidly modulated by small voltage changes, enabling fast switching without the high voltage penalties of conventional structures.
3Reliability
If a PN junction structure is used to achieve high breakdown voltage, then voltage characteristics improve, but turn-on voltage remains high
Solution Approach 1:
The patent decouples the breakdown voltage function from the turn-on voltage function. The P-N junction structure maintains high breakdown voltage characteristics for reliability, while the metal oxide semiconductor layer independently controls turn-on voltage to near-zero levels. This separation of functions allows simultaneous achievement of high reliability and low energy loss that were previously contradictory.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The semiconductor device achieves a reduced turn-on voltage, enabling operation without a cut-in voltage, and increases current density in the on-state, improving efficiency and performance in power semiconductor applications.
Implementation Method 1
an inversion channel may be formed in a portion where the P region and the insulating layer contact each other in an on state
Implementation Method 2
The most generally-used diode structure is a PN diode made of a PN junction
Data Source
AI summary
A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a substrate and an epi layer on an upper surface of the substrate. The semiconductor device also includes a P region located within the epi layer, at least one N+ region located within the P region, and at least one insulating layer in contact with the epi layer, the epi layer, the P region, and the at least one N+ region. The semiconductor device further includes an anode on the P region, the N+ region, and the insulating layer.


