Semiconductor Diode Carrier Injection Control via Segmented Cathodes
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Solution Overview
Problem
Current semiconductor devices face challenges in accurately adjusting carrier injection in diodes, particularly in Super Junction-Metal Oxide Semiconductor Field Effect Transistors (SJ-MOSFET) and Insulated Gate Bipolar Transistors (IGBT) due to limitations in the design and manufacturing processes.
Innovation Solution
The semiconductor device incorporates a diode region with a P-type buried layer, a cathode region, an inter-cathode region, and a floating region of alternating conductivity types, arranged in a specific structure on a semiconductor substrate, along with a method involving sequential dopant implantation steps to form these regions, ensuring precise control over carrier injection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a conventional diode structure with a single cathode region is used, then the device structure is simple, but the carrier injection amount cannot be adjusted with high accuracy
Solution Approach 1:
The cathode region is divided into multiple cathode regions (first cathode region, second cathode region, third cathode region) that are alternately arranged with inter-cathode regions. This segmentation allows independent control of carrier injection from each cathode region, enabling precise adjustment of total carrier injection by controlling the doping concentrations and dimensions of individual cathode regions
Solution Approach 2:
Each cathode region and inter-cathode region is assigned different doping concentrations and dimensional characteristics. The first cathode region has different properties than the second and third cathode regions, allowing localized optimization of carrier injection characteristics in different areas of the diode region
2Manufacturing precision
If the cathode region is made deeper to improve carrier injection control, then the carrier injection precision improves, but the manufacturing process complexity increases
Solution Approach 1:
The method employs a multi-step doping process where dopants are implanted in a specific sequence: first the collector region, then the floating region, and finally the cathode regions. This preliminary action approach allows each doping step to be optimized independently, with subsequent steps building upon previously formed structures, thereby achieving precise carrier injection control through systematic process design
3Manufacturing precision
If multiple cathode regions are alternately arranged with inter-cathode regions, then carrier injection precision is improved, but the device structure becomes more complex
Solution Approach 1:
Multiple cathode regions and inter-cathode regions are merged into a single integrated diode region structure that functions as one cohesive unit. The alternately arranged cathode and inter-cathode regions work together to provide precise carrier injection control while maintaining a unified structural framework that simplifies overall device design and manufacturing
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration allows for precise adjustment of carrier injection, enhancing the semiconductor device's performance by reducing current leakage and improving withstand voltage, thereby increasing the non-defective product rate.
Implementation Method 1
an implantation step for a collector region, an implantation step for a cathode region and an implantation step for a floating region. At the implantation step for the collector region, a dopant of a first conductivity type may be implanted in a lower surface of the semiconductor substrate
Data Source
AI summary
A semiconductor device including a diode region provided in a semiconductor substrate is provided, the diode region including a base region of a first conductivity type exposed on an upper surface of the semiconductor substrate, a cathode region of a second conductivity type exposed on a lower surface of the semiconductor substrate, an inter-cathode region of a first conductivity type exposed on the lower surface of the semiconductor substrate and alternately arranged with the cathode region in a predetermined direction, and a floating region of a second conductivity type provided above the cathode region and above the inter-cathode region.