Semiconductor Diode Structure for Soft Reverse Recovery
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Solution Overview
Problem
Semiconductor diodes experience snappy reverse recovery, leading to undesirable current and voltage oscillations, voltage overshoot, and electromagnetic interference, particularly in high voltage diodes with fast commutation velocities, due to sudden depletion of free charge carriers.
Innovation Solution
A semiconductor device design with embedded first and second semiconductor regions of different conductivity types, configured to inject charge carriers at distinct time points during reverse recovery, slowing down the depletion process and preventing snap-off, thereby achieving soft recovery behavior with reduced on-state conduction losses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If the free charge carrier distribution at the anode side is reduced to achieve soft recovery behavior, then reverse recovery oscillations are suppressed, but anodal emitter efficiency is reduced
Solution Approach 1:
The cathode layer is segmented into multiple p-type semiconductor regions (first, second, third regions) with different doping concentrations and depths, instead of using a single uniform structure. This segmentation allows each region to contribute differently to charge carrier injection during reverse recovery, achieving soft recovery while preserving overall emitter efficiency through optimized local properties
Solution Approach 2:
Different regions of the cathode layer are assigned different doping concentrations and depths to create local quality variations. The first p-type region has higher doping concentration and shallower depth, while the third p-type region has lower doping concentration and greater depth, allowing each local region to optimize its charge carrier injection timing and contribution
2Object-generated harmful factors
If p+-type regions are embedded in the n+-type cathode layer to achieve soft recovery, then current snap-off is prevented, but cathode emitter efficiency is decreased and forward voltage drop increases
Solution Approach 1:
The doping concentrations of the p-type regions are specifically optimized with a gradient pattern (first region: higher concentration, third region: lower concentration) to control the timing and amount of hole injection during reverse recovery. This parameter optimization ensures soft recovery is achieved while minimizing the impact on forward conduction characteristics and maintaining low forward voltage drop
Solution Approach 2:
The p-type regions are designed to provide partial hole injection during reverse recovery rather than complete replacement of the n-type cathode function. The first p-type region with higher doping provides stronger initial injection to prevent snap-off, while the other regions provide complementary injection, achieving the desired soft recovery effect with minimal penalty to forward voltage drop
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design significantly reduces voltage and current oscillations, voltage overshoot, and maintains low on-state conduction losses, enhancing the ruggedness and softness of high voltage diodes while preventing snap-off during reverse recovery.
Implementation Method 1
The first semiconductor region is configured to stop injecting charge carriers of the first conductivity type into the second semiconductor layer at a first time point during reverse recovery, the second semiconductor region is configured to stop injecting charge carriers of the first conductivity type into the second semiconductor layer at a second time point during reverse recovery
Data Source
AI summary
A semiconductor device a first semiconductor layer of a first conductivity type at a first main side of a semiconductor wafer and a second semiconductor layer of a second conductivity type at second main side. The second semiconductor layer forms a pn junction with the first semiconductor layer. A first electrode is in ohmic contact with the first semiconductor layer and a second electrode layer is in ohmic contact with the second semiconductor layer. A first semiconductor region of the first conductivity type completely embedded in the second semiconductor layer and a second semiconductor region of the first conductivity type completely embedded in the second semiconductor layer.