Semiconductor Discharge Structure for Plasma Charge Drainage

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Solution Overview

Problem

Plasma-induced charge accumulation during semiconductor manufacturing leads to dielectric damage in MOSFET devices, particularly in the FEOL, MEOL, and BEOL stages, causing voltage potential across dielectric layers to exceed threshold, leading to failures.

Innovation Solution

Incorporating a discharge structure that includes a diode grounded through the substrate, connected via doped regions and conductive vias, to establish a discharge path that drains plasma-induced charges away from dielectric layers, preventing damage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If plasma-enhanced operations are used in semiconductor manufacturing, then manufacturing precision and productivity are improved, but plasma-induced charge accumulation causes dielectric damage

Engineering Contradiction:
Improveetching precisionVSAvoidplasma-induced charge accumulation
Core Design Contradiction:
Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

A discharge structure comprising a diode, doped regions, and conductive vias is introduced as an intermediary component. This structure provides a dedicated charge discharge path that mediates between the plasma processing operations and the dielectric layers, redirecting plasma-induced charges away from the dielectric layers to prevent damage while maintaining the benefits of plasma-enhanced manufacturing

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The discharge structure converts the harmful plasma-induced charge accumulation into a beneficial discharge path. By providing a controlled route for charge dissipation through the diode and conductive vias, the harmful charges are redirected to perform a useful function (discharge to ground) rather than damaging the dielectric layers

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

2Reliability

If discharge structures are added to protect dielectric layers, then device reliability is improved, but device complexity increases

Engineering Contradiction:
Improvedielectric layer protectionVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The discharge structure is segmented into distinct functional components: a diode for charge rectification, doped regions for charge collection, and conductive vias for charge transport. This segmentation allows each component to be optimized independently and integrated into existing semiconductor fabrication processes without requiring complete redesign of the device architecture

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The discharge structure effectively redirects plasma-induced charges to ground, protecting dielectric layers from damage and maintaining device integrity during semiconductor fabrication.

Implementation Method 1

Radio-frequency (RF) plasmas may be used extensively in many of these processing steps

Methodology Applied
Scientific EffectPlasma: Plasma

Implementation Method 2

the charges are drained from the first well region to the substrate through the first doped region and the discharge structure

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 3

the discharge structure effectively redirects plasma-induced charges to ground, protecting dielectric layers from damage

Methodology Applied
Scientific EffectElectrical discharge: Electrostatic Discharge

Data Source

PatentUS20250226231A1Semiconductor structure including discharge structures and method for fabricating the same
Publication Date: 2025.07.10 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250226231A1 patent drawing
  • US20250226231A1 patent drawing
  • US20250226231A1 patent drawing

AI summary

A method includes providing a substrate of a first conductivity type, the substrate including a first circuit region and a second circuit region; forming a first well region of a second conductivity type in the first circuit region of the substrate; forming a first doped region of the second conductivity type in the first well region; forming a diode in the second circuit region of the substrate; forming a first transistor and a second transistor over the substrate in the first circuit region and the second circuit region, respectively; forming a discharge structure over the substrate to electrically couple the first doped region to the diode; and forming a metallization layer over the discharge structure to electrically couple the first transistor to the second transistor subsequent to the forming of the diode, wherein charges accumulated in the first well region are drained to the substrate through the discharge structure.