Semiconductor Discharge IC Single Control Signal Sequencing
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Solution Overview
Problem
Existing semiconductor integrated circuits for discharging require multiple control signals and multiple FETs to manage the off-sequence of power supplies, making it difficult to control discharge times and prone to shoot-through currents due to simultaneous activation of charging and discharging pathways.
Innovation Solution
A semiconductor integrated circuit with multiple discharging elements and a single control signal enables controlled discharge of power supplies by using MOS transistors and an inverter or Schmitt trigger circuit to manage the off-sequence and prevent simultaneous activation of charging and discharging pathways.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If multiple control signals and multiple FETs are used to manage the off-sequence of power supplies, then the discharge control capability is improved, but the device complexity increases
Solution Approach 1:
The patent combines multiple control functions into a single control signal that sequentially activates different discharging FETs. The control signal EN is reused across multiple time periods to control FETs M1, M2, M3 in sequence, eliminating the need for separate control signals for each FET and reducing overall system complexity while maintaining full discharge control capability.
Solution Approach 2:
The patent implements dynamic control where the discharging FETs are activated in a specific sequence based on the timing of the control signal EN. The control signal is applied to different FETs at different time periods, creating a dynamic discharge process that adapts to the power supply off-sequence requirements without requiring static multiple control signals.
2Adaptability or versatility
If multiple FETs are used to set different discharge times for multiple power outputs, then the discharge time flexibility is improved, but the device complexity increases
Solution Approach 1:
The patent uses dynamic timing control where the same control signal EN activates different FETs at different time periods. By controlling when each FET (M1, M2, M3) is activated, the system achieves flexible discharge time settings for multiple power outputs without requiring a separate FET for each time setting, thus reducing device complexity while maintaining adaptability.
Solution Approach 2:
The control signal EN serves multiple functions: it controls the power supply off-sequence, it sequentially activates different discharging FETs, and it enables flexible discharge time settings for multiple power outputs. This multi-functional approach eliminates the need for separate control mechanisms for each function, reducing the number of FETs and overall system complexity.
3Device complexity
If discharging FETs are activated without proper sequencing, then the discharge process is simplified, but shoot-through current occurs
Solution Approach 1:
The patent implements preliminary action by carefully sequencing the activation of discharging FETs through the control signal EN. Before activating one FET, the previous FET is already turned off, ensuring that charging and discharging pathways are never simultaneously active. This preliminary sequencing prevents shoot-through current while maintaining a relatively simple control mechanism using a single control signal.
Solution Approach 2:
The control mechanism uses implicit feedback through the sequential timing of the control signal EN. The controller monitors the state of power supplies and appropriately times the activation of each FET based on the discharge progress, ensuring that FETs are activated only when safe to do so, thus preventing shoot-through current without requiring complex real-time monitoring.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution allows for controlled off-sequence management of multiple power supplies using a single control signal, facilitates flexible discharge time settings, and prevents shoot-through currents by ensuring that charging and discharging pathways are not simultaneously active.
Implementation Method 1
a discharging FET is turned on by using a control signal EN to discharge residual charges in an output capacitor of the reference voltage supply so that the output voltage rapidly falls
Data Source
AI summary
Disclosed is a semiconductor integrated circuit for discharging, which includes: a plurality of discharging elements; a plurality of external terminals connected respectively to first terminals of the plurality of discharging elements; and a controlling external terminal which is capable of receiving from an outside a signal indicating that an operation of an internal circuit is enabled/disabled. In response to the signal received at the controlling external terminal or an output signal of a logic circuit that receives the signal being applied to controlling terminals of the plurality of discharging elements, the discharging semiconductor integrated circuit turns on the plurality of discharging elements to draw charges respectively through the plurality of external terminals.