Semiconductor Circuit Disturb Reduction via Voltage Control
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Solution Overview
Problem
Semiconductor circuits face challenges in reducing the possibility of 'disturb' phenomena during power resumption, where nonvolatile storage elements are used to quickly restore states after power suspension, but existing solutions are inefficient and may lead to data loss due to high store currents.
Innovation Solution
The semiconductor circuit design incorporates specific transistors and storage elements that control voltage settings to manage resistance states of storage elements, ensuring sufficient store currents without flowing through volatile SRAM circuits, thereby reducing the risk of data loss and area reduction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If nonvolatile storage elements are used to restore states after power suspension, then the circuit return time is reduced, but the possibility of causing disturb increases
Solution Approach 1:
The patent divides the storage function into two separate elements: a volatile storage element (SRAM) for fast access and a nonvolatile storage element for data retention. This segmentation allows the circuit to benefit from both fast restoration and data persistence without the disturb issues affecting the entire storage system.
Solution Approach 2:
The patent introduces a transfer circuit as an intermediary between the volatile and nonvolatile storage elements. This transfer circuit mediates the data transfer process, enabling controlled copying of data between storage elements and preventing direct disturbance effects from propagating through the system.
2Reliability
If store current is increased to ensure sufficient writing to storage elements, then the storage reliability is improved, but the circuit area increases
Solution Approach 1:
The patent changes the electrical parameters of the transistors involved in the store current path, specifically using transistors with lower threshold voltages or higher mobility in the storage element write path. This allows sufficient store current to be achieved without proportionally increasing the transistor sizes and thus the overall circuit area.
Solution Approach 2:
The patent utilizes vertical stacking or three-dimensional transistor configurations to increase the effective channel width or area without increasing the planar footprint. This dimensional approach allows higher store currents to be achieved while maintaining compact circuit area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively reduces the possibility of data loss during power resumption by managing store currents and maintaining accurate resistance states, enhancing reliability and reducing circuit area.
Implementation Method 1
a spin-transfer torque storage element
Data Source
AI summary
A semiconductor circuit according to the disclosure includes a first circuit that can generate an inverted voltage of a voltage at a first-node and apply the inverted voltage to a second-node, a second circuit that can generate an inverted voltage of the voltage at the second-node and apply the inverted voltage to the first-node, a first transistor coupling the first-node to the third-node by turning on, a first storage element having a first terminal coupled to the third-node and a second terminal supplied with a control voltage and being able to take a first or second resistance state, a first voltage setting circuit that is coupled to the third-node and can set a voltage at the third-node to a voltage corresponding to a voltage at a predetermined node out of the first and second nodes, and a driver controlling an operation of the first transistor and setting the control voltage.