Semiconductor Device Manufacturing Method for Divot Prevention

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The reliability of semiconductor devices manufactured using a SOI substrate is compromised due to issues with element isolation and etching processes, leading to potential failures such as the formation of divots in the element isolation region, which can result in leakage currents and decreased device reliability.

Innovation Solution

A manufacturing method for semiconductor devices that involves forming a substrate with a semiconductor substrate, an insulating layer, and a semiconductor layer, followed by the creation of a trench for element isolation, where the insulating layer, first insulating film, and element isolation region are made of the same material, and subsequent dry etching steps to expose and reduce the insulating layer thickness, while using mask layers to control etching and prevent excessive etching of the element isolation region.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If dry etching is used to remove the first insulating film and reduce the insulating layer thickness, then manufacturing precision is improved, but the element isolation region may be excessively etched forming divots

Engineering Contradiction:
Improveetching precisionVSAvoiddevice reliability
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

A first mask layer is formed before the dry etching process to cover and protect the element isolation region. This preliminary protective action prevents the etching gas from attacking the element isolation region during the dry etching process, thereby avoiding divot formation while still allowing precise removal of the first insulating film and reduction of the insulating layer thickness in the active regions.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If the insulating layer thickness is reduced to improve device performance, then productivity is improved, but the risk of leakage currents increases

Engineering Contradiction:
Improvedevice performanceVSAvoidleakage current risk
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The mask layer provides selective protection with different local qualities: regions under the mask layer (element isolation regions) are protected from etching, while regions without the mask layer (active regions) undergo etching to reduce insulating layer thickness. This local differentiation allows the insulating layer thickness to be optimized for performance in active regions while maintaining sufficient thickness in element isolation regions to prevent leakage currents.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method improves the reliability of semiconductor devices by preventing the formation of divots in the element isolation region, reducing the risk of leakage currents, and maintaining the optimal thickness of the insulating layer, thereby enhancing the overall performance and reliability of the semiconductor device.

Implementation Method 1

removing the first insulating film in the second region by dry etching with using the first mask layer as an etching mask

Methodology Applied
Scientific EffectDry etching:

Implementation Method 2

removing the semiconductor layer in the second region by dry etching with using the first mask layer as an etching mask

Methodology Applied
Scientific EffectDry etching:

Implementation Method 3

performing dry etching for the insulating layer in the second region with using the first mask layer as an etching mask, thereby reducing a thickness of the insulating layer

Methodology Applied
Scientific EffectDry etching:

Implementation Method 4

removing the first mask layer

Methodology Applied
Scientific Effect:

Implementation Method 5

forming a first semiconductor region by ion-implanting an impurity to the semiconductor substrate in the first region, and forming a second semiconductor region by ion-implanting an impurity to the semiconductor substrate in the second region

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 6

removing the first insulating film in the first region and the insulating layer in the second region by wet etching

Methodology Applied
Scientific EffectWet etching:

Data Source

PatentUS10559595B2Manufacturing method of semiconductor device
Publication Date: 2020.02.11 RENESAS ELECTRONICS CORP
  • US10559595B2 patent drawing
  • US10559595B2 patent drawing
  • US10559595B2 patent drawing

AI summary

A substrate in which an insulating layer, a semiconductor layer and an insulating film are stacked on a semiconductor substrate and an element isolation region is embedded in a trench is prepared. After the insulating film in a bulk region is removed by dry etching and the semiconductor layer in the bulk region is removed by dry etching, the insulating layer in the bulk region is thinned by dry etching. A first semiconductor region is formed in the semiconductor substrate in a SOI region by ion implantation, and a second semiconductor region is formed in the semiconductor substrate in the bulk region by ion implantation. Then, the insulating film in the SOI region and the insulating layer in the bulk region are removed by wet etching. Thereafter, a first transistor is formed on the semiconductor layer in the SOI region and a second transistor is formed on the semiconductor substrate in the bulk region.