Semiconductor Doped Region Overlap for High-Voltage Scaling
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Solution Overview
Problem
The challenge in semiconductor technology is maintaining electrical efficiency while scaling down semiconductor structures, particularly for high-voltage devices, which requires larger device areas, hindering the development of smaller devices.
Innovation Solution
A semiconductor structure with a substrate, device region, and symmetrical doped regions and gate structures, where the doped regions are formed adjacent to the device regions and overlapped by the gate structures, improving breakdown voltage uniformity and preventing current leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the device area is increased to maintain electrical efficiency for high-voltage devices, then the electrical efficiency is improved, but the device scaling down is hindered
Solution Approach 1:
The patent applies local quality by creating asymmetric doping concentrations in different regions of the semiconductor device. Specifically, the first doped region has a different doping concentration than the second doped region, allowing each region to be optimized for its specific function. This enables high-voltage operation in certain regions while maintaining compact overall device dimensions, resolving the contradiction between electrical efficiency and device area.
Solution Approach 2:
The patent transitions from a symmetric two-dimensional device structure to an asymmetric structure with extended regions in specific directions. The first doped region extends further than the second doped region, creating an asymmetric layout that optimizes the electric field distribution. This dimensional asymmetry allows the device to achieve high-voltage breakdown without requiring a uniformly large device area, thus enabling scaling down while maintaining electrical efficiency.
2Area of moving object
If the device area is reduced for scaling down, then the device size is reduced, but the electrical efficiency drops dramatically
Solution Approach 1:
By implementing different doping concentrations in different regions (first doped region versus second doped region), the patent enables compact device dimensions while maintaining high-voltage breakdown capability. The locally optimized doping profiles ensure that electrical efficiency is preserved in critical regions even when the overall device area is reduced for scaling.
Solution Approach 2:
The asymmetric extension of the first doped region in specific directions creates an optimized electric field distribution that maintains high-voltage performance in a reduced device footprint. This dimensional asymmetry allows the device to achieve high breakdown voltage without requiring a uniformly large area, enabling successful device scaling.
3Ease of manufacture
If symmetric doped regions are used, then the manufacturing process is simplified, but the breakdown voltage uniformity is reduced
Solution Approach 1:
The patent deliberately introduces asymmetry in the doped region configuration, where the first doped region has different dimensions or doping concentration compared to the second doped region. This asymmetric design optimizes the electric field distribution to achieve uniform breakdown voltage characteristics across the device, while the doping process itself remains compatible with standard semiconductor manufacturing techniques.
Data Source
AI summary
A semiconductor structure and a method for manufacturing the same are provided. The semiconductor structure comprises a substrate, a device region, a first doped region and a gate structure. The first doped region is formed in the substrate adjacent to the device region. The gate structure is on the first doped region. The first doped region is overlapped the gate structure.