Semiconductor Device Impurity-Doped Regions Parasitic Capacitance
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Solution Overview
Problem
As semiconductor devices shrink, the reduced distances between gate electrodes, contacts, and gate contacts lead to increased parasitic capacitance, causing operation errors and deteriorating electrical characteristics, especially when high dielectric constant insulating materials are used.
Innovation Solution
A semiconductor device is designed with an interlayer insulating film that includes impurity-doped regions with a lower dielectric constant, such as fluorine or carbon, to reduce parasitic capacitance by forming these regions around contacts and between gate electrodes and contacts, thereby improving electrical characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If high dielectric constant insulating materials are used to enhance electrical characteristics of small-sized devices, then device miniaturization is improved, but parasitic capacitance increases causing operation errors
Solution Approach 1:
The patent applies local quality by creating impurity-doped regions with different dielectric constants in specific locations around contacts and gate electrodes. The interlayer insulating film is selectively doped with impurities (such as fluorine or carbon) in regions adjacent to contacts and gate electrodes, while maintaining undoped regions elsewhere. This local modification reduces parasitic capacitance in critical areas without compromising the overall device miniaturization benefits.
Solution Approach 2:
The patent changes the dielectric constant parameter of the interlayer insulating film by introducing impurities. The impurity-doped regions have a lower dielectric constant than the undoped regions, which directly reduces the parasitic capacitance between adjacent conductive structures. This parameter change is achieved through controlled impurity diffusion or implantation processes that modify the electrical properties of the insulating material in specific zones.
2Productivity
If distance between gate electrodes and contacts is reduced to improve device density, then productivity is improved, but parasitic capacitance increases causing operation errors
Solution Approach 1:
The patent maintains small distances between gate electrodes and contacts for high device density, but introduces impurity-doped regions with lower dielectric constants in the interlayer insulating film specifically in the regions between these structures. This local modification reduces parasitic capacitance in the critical coupling areas, allowing close spacing without compromising operation accuracy.
Solution Approach 2:
The impurity-doped regions act as intermediary zones between the gate electrodes and contacts. These regions have modified electrical properties (lower dielectric constant) that mediate the electromagnetic interaction between adjacent conductive structures, reducing parasitic capacitance effects while allowing the structures to remain closely spaced for high density.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The use of impurity-doped regions with a lower dielectric constant effectively minimizes parasitic capacitance, enhancing the electrical performance of small-sized semiconductor devices by reducing operation errors and improving overall device characteristics.
Implementation Method 1
an impurity-doped region formed around the contacts in the interlayer insulating film and along a lengthwise direction of the contacts... The interlayer insulating film may include the impurity-doped region and an undoped region, wherein a dielectric constant of the impurity-doped region is smaller than that of the undoped region
Data Source
AI summary
A semiconductor device includes an interlayer insulating film formed on a substrate, a plurality of contacts formed in the interlayer insulating film, and an impurity-doped region formed around the contacts in the interlayer insulating film and along a lengthwise direction of the contacts.