Semiconductor Double Patterning with Buffer Layer for Fine Pattern Formation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current methods face challenges in forming semiconductor device patterns with features narrower than photolithography resolution limits and achieving adequate gap-filling for trench isolation layers, especially when sections are narrow and pitches are fine.
Innovation Solution
A double patterning technique involving a first and second hard mask layer, with a buffer layer formed between the mask patterns, allowing for precise etching and formation of a trench isolation layer using different materials, ensuring excellent gap-filling and preventing damage to the isolation layer during mask removal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If photolithography is used to form patterns, then the manufacturing process is simple, but the minimum feature width and pitch are limited by resolution limits
Solution Approach 1:
The patterning process is divided into two separate steps: first forming a preliminary pattern with photolithography, then using that pattern as a mask to create the final fine-pitch pattern through selective etching. This segmentation allows each step to operate within its capability limits while achieving the final high-precision result.
Solution Approach 2:
A preliminary pattern is formed first using standard photolithography processes, which then serves as the basis for creating the final fine-pitch pattern. This preliminary structure enables subsequent processing to achieve higher precision than direct photolithography alone could provide.
2Manufacturing precision
If trench width is reduced to achieve finer pitch, then pattern density increases, but gap-filling becomes inadequate
Solution Approach 1:
The etching process uses locally optimized conditions where the buffer layer provides different etching rates in different regions. The buffer layer thickness and composition are tailored to local requirements, ensuring adequate gap-filling in narrow trenches while maintaining precision in the final pattern dimensions.
Solution Approach 2:
A buffer layer is introduced as an intermediary between the hard mask layer and the substrate. This buffer layer mediates the etching process by providing controlled material removal rates, ensuring that narrow trenches are properly filled while maintaining the integrity of the final fine-pitch pattern.
3Ease of manufacture
If the same material is used for hard mask pattern and isolation layer, then process steps are reduced, but the isolation layer is damaged during mask removal
Solution Approach 1:
Different materials are used for the hard mask pattern and isolation layer to provide distinct local properties. The hard mask uses materials resistant to etching, while the isolation layer uses materials optimized for electrical isolation and mechanical stability, allowing each layer to perform its specific function without compromising the other.
Solution Approach 2:
The structure employs composite materials with different etching characteristics - a silicon oxide hard mask layer combined with a nitride isolation layer. This composite approach allows selective removal of the mask while preserving the isolation layer, achieving both process efficiency and structural integrity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables the formation of semiconductor device patterns with smaller topographic features and excellent gap-filling characteristics, ensuring the isolation layer is not damaged during mask removal, thus simplifying the process and enhancing the resolution beyond photolithography limits.
Implementation Method 1
a buffer layer is formed over both sidewalls of each topographical feature of the first mask pattern
Implementation Method 2
a buffer layer is formed over both sidewalls of each topographical feature of the first mask pattern
Implementation Method 3
A first hard mask pattern which exposed portions of the substrate is then formed by etching the first hard mask layer using an etch mask
Implementation Method 4
A trench is formed in the substrate by etching the exposed portions of the substrate using the first hard mask pattern as an etch mask
Data Source
AI summary
A method of forming a fine pattern of a semiconductor device uses a double patterning technique. A first mask pattern is formed on a first hard mask layer disposed on a substrate. A conformal buffer layer is formed over the first mask pattern. A second mask pattern is formed such that segments of the buffer layer are interposed between the first and second mask patterns, and each topographical feature of the second mask pattern is disposed between two adjacent ones of each respective pair of topographical features of the first mask pattern. A first hard mask pattern is formed by etching the first hard mask layer using the first mask pattern, the second mask pattern, and/or the buffer layer as an etch mask. A trench is formed by etching the substrate using the first hard mask pattern as an etch mask. An isolation layer, of a material that is different from that of first hard mask pattern, is formed in the trench.