Semiconductor Drift Region Doping Profile for Snapback Suppression
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Solution Overview
Problem
High voltage semiconductor devices are prone to breakdown due to snapback phenomena caused by impact ionization, which increases with miniaturization and integration, leading to unreliable device performance.
Innovation Solution
A semiconductor device design featuring drift regions with specific impurity doping profiles and shallow trench isolation regions to reduce the impact ionization phenomenon, including forming gate electrodes, source and drain regions, and diffusing impurities to control breakdown voltage properties.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If semiconductor devices are miniaturized and densely integrated, then device integration and size reduction are achieved, but breakdown voltage reliability deteriorates due to increased snapback phenomena
Solution Approach 1:
The patent applies local quality by creating a drift region with a specific impurity concentration profile (first concentration at surface, second concentration at depth, where first < second) in the localized area between the gate electrode and drain region. This localized doping structure modifies the electric field distribution specifically where snapback occurs, preventing impact ionization in the critical region while maintaining overall device miniaturization and integration benefits.
2Power
If voltage applied to drain is increased to improve device performance, then electron transport from source to drain is enhanced, but impact ionization phenomenon increases causing snapback and breakdown
Solution Approach 1:
The patent changes the impurity concentration parameter in the drift region by implementing a depth-dependent profile where the concentration increases from the surface toward the substrate. This parameter modification alters the electric field characteristics, reducing the peak field strength that causes impact ionization, thereby suppressing snapback phenomena while allowing the device to operate at required power levels.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively suppresses impact ionization and snapback phenomena, enhancing breakdown voltage properties while maintaining reliable device performance in high voltage applications.
Implementation Method 1
impact ionization phenomenon under a gate electrode spacer near the drain
Implementation Method 2
drift regions are formed by implanting first and second conductive-type impurities into the semiconductor substrate adjacent to the gate
Data Source
AI summary
A semiconductor device comprises a gate electrode on a semiconductor substrate, drift regions at opposite sides of the gate electrode, source and drain regions in the respective drift regions, and shallow trench isolation (STI) regions in the respective drift regions between the gate electrode and the source or drain region, wherein the drift regions comprise first and second conductivity-type impurities.