Semiconductor Device Vertical Drift Region Field Management
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Solution Overview
Problem
Conventional semiconductor devices with vertical drift regions face a trade-off between breakdown voltage and on-resistance, where low impurity concentration in the vertical drift region improves breakdown voltage but increases on-resistance, and high impurity concentration reduces on-resistance but may lead to dielectric breakdown.
Innovation Solution
Incorporating a p-type semiconductor region on the surface of the semiconductor layer, which is separated from the vertical drift region by body regions, allows for effective depletion of the front surface portion of the vertical drift region, alleviating the electric field on the gate insulation film and maintaining high breakdown voltage even with high impurity concentration, thus improving the trade-off between breakdown voltage and on-resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the impurity concentration of the vertical drift region is set low to improve breakdown voltage, then breakdown voltage is improved, but on-resistance increases
Solution Approach 1:
The patent applies local quality by creating a p-type semiconductor region specifically at the front surface portion of the vertical drift region, while maintaining high impurity concentration throughout the entire vertical drift region. This localized p-type region has a width of 0.1 to 10 micrometers and forms a depletion layer that selectively reduces the electric field at the critical gate insulation film interface without affecting the overall conductivity of the vertical drift region. This resolves the contradiction by providing high breakdown voltage through local field reduction while maintaining low on-resistance through high bulk impurity concentration.
2Manufacturing precision
If the impurity concentration of the vertical drift region is set high to reduce on-resistance, then on-resistance is reduced, but dielectric breakdown of the gate insulation film may occur
Solution Approach 1:
The patent introduces a p-type semiconductor region as an intermediary element between the high impurity concentration vertical drift region and the gate insulation film. This p-type region acts as a mediator that reduces the electric field strength at the gate insulation film interface through depletion layer formation, preventing dielectric breakdown. The intermediary p-type region allows the system to maintain high bulk impurity concentration for low on-resistance while protecting the gate insulation film from excessive electric field stress.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively suppresses dielectric breakdown while maintaining low on-resistance by ensuring the vertical drift region is pinched off, allowing the semiconductor device to operate with high breakdown voltage and low on-resistance, leveraging the high dielectric breakdown field properties of silicon carbide or nitride semiconductors.
Implementation Method 1
When the semiconductor device 100 is off, a depletion layer extends from each body region 123 into the vertical drift region 121b
Implementation Method 2
electric field applied to the gate insulation film 136a of the insulation gate section 136 is alleviated
Implementation Method 3
an inversion layer is formed by a potential of the gate electrode 136b in the portion of each body region 123 which separates the vertical drift region 121b and the corresponding source region 125, and electrons flow into the vertical drift region 121b from the source regions 125 through the inversion layers
Data Source
AI summary
A semiconductor device may include a semiconductor layer, an insulation gate section, and a first conductivity-type semiconductor region; wherein the semiconductor layer may include a vertical drift region being of a second conductivity type and disposed at the one of main surfaces; a body region being of the first conductivity type, adjoining the vertical drift region, and disposed at the one of main surfaces; and a source region being of the second conductivity type, separated from the vertical drift region by the body region, and disposed at the one of main surfaces, wherein the insulation gate section is opposed to a portion of the body region which separates the vertical drift region and the source region; and the first conductivity-type semiconductor region is opposed to at least a part of a portion of the vertical drift region which is disposed at the one of main surfaces.