Semiconductor Drift Region Charge Carrier Storage

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Compensation semiconductor devices face premature destruction due to abrupt interruption of diode reverse current during fast de-commutation, which is exacerbated by high doping and close spacing of charge compensation zones, leading to high voltage peaks and oscillations, making them unsuitable for fast recovery epitaxial diode field effect transistors.

Innovation Solution

Incorporating a charge carrier storage region partially free of charge compensation zones to hold stored charge carriers until the end of the commutation process, ensuring a soft switching behavior by delaying voltage increase and reducing reverse current interruption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If charge compensation zones are highly doped and closely spaced to reduce on-state resistance, then on-state resistance is improved, but diode reverse current interruption becomes abrupt causing voltage peaks and device destruction

Engineering Contradiction:
Improvedevice reliabilityVSAvoidvoltage peaks and oscillations
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The drift region is segmented into alternating charge compensation zones and charge carrier storage zones. This segmentation allows different regions to perform different functions: charge compensation zones reduce on-state resistance through high doping, while charge carrier storage zones provide controlled carrier release during commutation, preventing abrupt current interruption and voltage peaks.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different zones within the drift region are given different doping characteristics. The charge compensation zones have high doping for low resistance, while the charge carrier storage zones have lower doping to maintain stored carriers. This local quality differentiation allows simultaneous optimization of on-state resistance and switching behavior in different regions.

Inventive Principle:
Principle #3Local quality

2Reliability

If compensation semiconductor devices are optimized for minimum on-state resistance, then on-state resistance is reduced, but switching speed of the body diode deteriorates

Engineering Contradiction:
Improveon-state resistance performanceVSAvoiddiode switching speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

Charge carriers are pre-stored in the charge carrier storage zones during the on-state before commutation begins. This preliminary accumulation of carriers ensures that when commutation starts, sufficient carriers are available to maintain continuous current flow, enabling fast diode switching without abrupt interruption caused by carrier depletion.

Inventive Principle:
Principle #10Preliminary action

3Speed

If the lifetime of charge carriers is reduced to improve fast commutation, then switching behavior is slightly improved, but the level of flood charges available is limited

Engineering Contradiction:
Improvecommutation speedVSAvoidflood charge carriers
Core Design Contradiction:
SpeedVSQuantity of substance

Solution Approach 1:

The doping concentration in charge carrier storage zones is optimized to balance carrier lifetime and storage capacity. By controlling the doping level, the device maintains sufficient carrier lifetime to accumulate adequate flood charges in the storage zones, while still achieving fast commutation through controlled carrier release, overcoming the limitation of reduced carrier lifetime approaches.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach minimizes the risk of premature device destruction by maintaining a soft switching behavior, reducing dynamic losses, and optimizing switching performance while maintaining a low on-state resistance.

Implementation Method 1

At least one charge carrier storage region which is at least partially free of charge compensation zones is arranged in the semiconductor body

Methodology Applied
Scientific EffectCharge carrier storage:

Data Source

PatentUS9070789B2Semiconductor device and method for producing a semiconductor device
Publication Date: 2015.06.30 INFINEON TECH AUSTRIA AG
  • US9070789B2 patent drawing
  • US9070789B2 patent drawing
  • US9070789B2 patent drawing

AI summary

A semiconductor device has a semiconductor body with a semiconductor device structure including at least a first electrode and a second electrode. Between the two electrodes, a drift region is arranged, the drift region including charge compensation zones and drift zones arranged substantially parallel to one another. At least one charge carrier storage region which is at least partially free of charge compensation zones is arranged in the semiconductor body.