Drive Control Device for Semiconductor Arm Short Circuit Prevention
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Solution Overview
Problem
Existing semiconductor drive control devices struggle to simultaneously reduce switching loss and conduction loss in power conversion systems, particularly in half-bridge circuits, due to challenges in timing the application of gate drive pulses and varying characteristics across different semiconductor elements.
Innovation Solution
A drive control device that includes a current detection system to determine the timing of gate drive signal application, ensuring the gate drive voltage is applied appropriately to reduce switching loss and conduction loss, by setting specific time periods for the application and shut-off of the gate drive signal based on current flow through the diode structure, thereby preventing arm short circuits and optimizing the re-injection time period.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the gate drive pulse is applied earlier to prevent arm short circuit, then the switching loss is reduced, but the amount of holes to be re-injected increases, decreasing the reverse recovery current reduction effect
Solution Approach 1:
The pulse width of the gate drive signal is dynamically adjusted based on the dead time period. By changing this parameter, the control device optimizes the timing to prevent arm short circuit while minimizing hole re-injection, thereby maintaining effectiveness in reducing reverse recovery current
Solution Approach 2:
The control device uses feedback from the dead time period measurement to adjust the gate drive pulse width. This feedback mechanism ensures that the pulse is applied at the optimal timing to prevent arm short circuit while maintaining maximum effectiveness in reducing reverse recovery current
Data Source
AI summary
A drive control device for two semiconductor elements having a transistor structure and a diode structure with a common energization electrode includes: a current detection device outputting a current detection signal of the semiconductor elements; and a first control device outputting a gate drive signal from when a first time period has elapsed from a starting time to when a second time period has elapsed from the starting time, at which an off-command signal is input after it is determined that a current flows through the semiconductor elements in a forward direction of the diode structure during a time period for which an on-command signal is input to the semiconductor elements. The first and the second time periods are preliminary set not to generate an arm short-circuit between two semiconductor elements.