Semiconductor Driver Circuit High Speed Operation

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Solution Overview

Problem

The existing driver circuits for display devices, such as those in liquid crystal display devices and EL display devices, face challenges in operating at high and low driving frequencies due to limitations in transistor channel width to channel length ratio (W/L) and difficulty in maintaining a floating gate state, which narrows the range of operational frequencies.

Innovation Solution

A semiconductor device configuration that includes a first transistor, a second transistor, and a capacitor, where the transistors are connected in specific signal periods to maintain high gate potential and reduce W/L, allowing for operation across a wide range of driving frequencies by controlling signal transitions and using capacitors to manage potential differences.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the W/L ratio of transistor M3 is increased to raise the gate potential of transistor M1 rapidly, then the gate potential rises faster, but the size of transistor M3 increases resulting in increased layout area

Engineering Contradiction:
Improvegate potential rise speedVSAvoidtransistor M3 layout area
Core Design Contradiction:
SpeedVSArea of moving object

Solution Approach 1:

A capacitor is introduced as an intermediary element connected between the gate of transistor M1 and ground. This capacitor stores charge and maintains the gate potential of M1, enabling rapid potential rise without requiring an increased W/L ratio of transistor M3, thus avoiding layout area expansion while achieving fast gate potential transition

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If the gate of transistor M1 is kept in floating state to enable high frequency operation, then the driving frequency can be increased, but charge leaks from the gate due to off-state current making it difficult to prolong the floating period

Engineering Contradiction:
Improvedriving frequencyVSAvoidfloating gate state maintenance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The capacitor is extracted from the conventional circuit configuration and specifically connected to the gate of transistor M1. This extraction allows the capacitor to independently store charge and maintain the floating gate potential, separating the charge storage function from the transistor itself and enabling prolonged floating state even at high driving frequencies despite off-state current leakage

Inventive Principle:
Principle #2Taking out (Extraction)

3Ease of operation

If transistor M3 is used to control the gate potential of transistor M1, then the circuit can operate, but the time from signal GOUT[N-1] going high until transistor M3 turns off becomes long limiting frequency increase

Engineering Contradiction:
Improvecircuit operationVSAvoidtransistor M3 turn-off time
Core Design Contradiction:
Ease of operationVSLoss of time

Solution Approach 1:

The capacitor is pre-charged during the period when transistor M3 is conducting, storing sufficient charge before M3 turns off. This preliminary charge storage action ensures that when M3 turns off, the capacitor can immediately maintain the gate potential of M1 without waiting for M3's gradual turn-off, significantly reducing the time loss and enabling faster operation

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9245909B2Semiconductor device
Publication Date: 2016.01.26 SEMICON ENERGY LAB CO LTD
  • US9245909B2 patent drawing
  • US9245909B2 patent drawing
  • US9245909B2 patent drawing

AI summary

A semiconductor device capable of high-speed operation. The semiconductor device includes a first transistor, a second transistor, and a capacitor. One of a source and a drain of the first transistor is supplied with a first signal. One of a source and a drain of the second transistor is supplied with a first potential. A gate of the second transistor is supplied with a second signal. A first electrode of the capacitor is electrically connected to the other of the source and the drain of the first transistor. A second electrode of the capacitor is electrically connected to the other of the source and the drain of the second transistor. In a first period, the first signal is low and the second signal is high. In a second period, the first signal is high and the second signal is either low or high.