Semiconductor Device Driving Transistors Electrical Isolation

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Solution Overview

Problem

Existing semiconductor devices face challenges in achieving high integration and reliability due to electrical isolation issues between high-voltage transistors, which can lead to malfunction and inefficiency.

Innovation Solution

A semiconductor device design featuring a lower level device layer over a substrate, an interlayer insulating film, and an upper level device layer with electrically isolated semiconductor patterns, each including active and body contact portions to prevent floating states and ensure proper electrical connection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple high-voltage transistors are integrated in a semiconductor device, then device integration and functionality are improved, but electrical isolation between transistors becomes difficult to achieve, leading to potential malfunction and reduced reliability

Engineering Contradiction:
Improvedevice integrationVSAvoidelectrical isolation
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The semiconductor device is divided into multiple isolated semiconductor regions (first semiconductor region, second semiconductor region, third semiconductor region) that are electrically isolated from each other. Each region can host independent high-voltage transistors, allowing multiple transistors to be integrated while maintaining electrical isolation through the substrate structure and insulating layers between regions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

An intermediate transfer transistor is introduced to mediate signal transfer between the first and second semiconductor regions. This transfer transistor enables communication between isolated regions without compromising their electrical isolation, thus maintaining reliability while achieving device integration through the mediating element.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If high-voltage transistors are integrated without proper isolation, then device integration is improved, but floating body effects occur causing malfunction and reduced reliability

Engineering Contradiction:
Improvedevice integrationVSAvoidfloating body effects prevention
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The body connections are extracted and made explicit in the design. Each semiconductor region is independently connected to its own body contact, removing the floating body condition that causes malfunction. This extraction of body connections ensures that each transistor region operates with proper potential reference, preventing floating body effects while maintaining high integration.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

Body contacts are established in advance during the fabrication process, before the transistors operate. The substrate and insulating structures are pre-configured to provide proper body potential, preventing floating body effects from occurring during device operation. This preliminary establishment of electrical connections ensures reliable transistor operation from the start.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS8258517B2Semiconductor device having driving transistors
Publication Date: 2012.09.04 SAMSUNG ELECTRONICS CO LTD
  • US8258517B2 patent drawing
  • US8258517B2 patent drawing
  • US8258517B2 patent drawing

AI summary

One embodiment exemplarily described herein can be generally characterized as a semiconductor device that includes a lower level device layer located over a semiconductor substrate, an interlayer insulating film located over the lower level device layer and an upper level device layer located over the interlayer insulating film. The lower level device layer may include a plurality of devices formed in the substrate. The upper level device layer may include a plurality of semiconductor patterns and at least one device formed in each of the plurality of semiconductor patterns. The plurality of semiconductor patterns may be electrically isolated from each other. Each of the plurality of semiconductor patterns may include at least one active portion and at least one body contact portion electrically connected to the at least one active portion.