Semiconductor Package Dual Carrier Stacking for Thin Profile
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Solution Overview
Problem
Semiconductor device packages face challenges in reducing their area footprint while maintaining performance, as mounting components on both surfaces increases area and stacking increases thickness, hindering connection to circuit boards.
Innovation Solution
The solution involves a semiconductor device package with a first and second carrier, each with electronic components on opposite surfaces, connected by an electrical connection structure, allowing for reduced thickness and fine-pitch connections using circuit layers instead of substrates, and a method of manufacturing that includes forming carriers with interconnection and dielectric layers, disposing electronic components, and forming package bodies to cover these components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If electronic components are arranged side-by-side on the top surface or bottom surface of the substrate, then the area of semiconductor device package increases, but the functionality and performance can be enhanced
Solution Approach 1:
The patent transitions from two-dimensional planar arrangement of electronic components to three-dimensional stacking arrangement using multiple carriers (first carrier and second carrier) connected vertically. This dimensional change allows components to be arranged in layers above and below each other, increasing component density without proportionally increasing the package footprint area.
Solution Approach 2:
The patent divides the semiconductor device package into multiple independent carriers (first carrier and second carrier) that can be separately manufactured and then stacked together. Each carrier can hold electronic components on both its top and bottom surfaces, effectively segmenting the component arrangement space and enabling higher component density within a compact footprint.
2Area of stationary object
If electronic components are arranged in a stacking arrangement, then the area of semiconductor device package is reduced, but the thickness of the semiconductor device package increases, hindering connection to another circuit board
Solution Approach 1:
The patent employs thin carrier structures with circuit layers that provide electrical interconnection between stacked electronic components. These thin carriers reduce the overall thickness of the package compared to traditional thick substrates, enabling fine-pitch connections and facilitating connection to external circuit boards while maintaining the benefits of three-dimensional component stacking.
Solution Approach 2:
The patent changes the physical parameters of the interconnection structure by using thin circuit layers with fine-pitch traces instead of thick traditional substrates. This parameter change in thickness and trace pitch allows the package to maintain reduced area footprint while minimizing thickness increase, thereby resolving the contradiction between compact area and connection feasibility.
3Strength
If traditional substrates are used for mounting electronic components, then the structural support is sufficient, but the fine-pitch connections and manufacturing cost efficiency are reduced
Solution Approach 1:
The patent segments the traditional monolithic substrate into multiple thin carrier layers, each optimized for specific functions. These segmented carriers can be manufactured with higher precision using standard PCB techniques, enabling fine-pitch trace routing and better electrical interconnection while maintaining adequate structural support through the stacked assembly.
Solution Approach 2:
The patent uses composite structures combining multiple thin carrier materials with different properties optimized for their specific functions. This composite approach allows each layer to contribute to structural support while enabling fine-pitch connections through optimized trace designs, achieving both mechanical strength and manufacturing precision that would be difficult with a single thick substrate.
Data Source
AI summary
A semiconductor device package includes a first carrier, a first electronic component, a second electronic component, a second carrier and an electrical connection structure. The first carrier has a first surface and a second surface opposite to the first surface. The first electronic component is disposed on the first surface of the first carrier. The second electronic component is disposed on the second surface of the first carrier. The second carrier has a first surface facing the second surface of the first carrier and a second surface opposite to the first surface. The electrical connection structure is electrically connecting the first carrier with the second carrier.