Semiconductor Device Dual Insulating Layers Current Collapse
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Solution Overview
Problem
Conventional semiconductor device manufacturing methods face challenges such as increased surface unevenness due to thermal oxidation, reduced mobility, and high manufacturing costs associated with trench isolation structures, as well as current collapse issues due to insufficient insulation between devices.
Innovation Solution
The use of a semiconductor device structure incorporating a collapse inhibiting layer made of insulating material like silicon nitride in the element region and a leakage inhibiting layer made of a different insulating material, such as silicon oxide, in the element isolation region, formed using deposition techniques to prevent leaks and current collapse.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If thermal oxidation is used to form an insulating oxide film in the element isolation region, then the insulating structure between devices is facilitated, but surface unevenness increases and mobility is reduced
Solution Approach 1:
The patent segments the insulating film formation process into two distinct parts: a first insulating film (oxide) formed by thermal oxidation in the element isolation region, and a second insulating film (nitride) formed by deposition over the entire surface. This segmentation allows each film to perform its specific function - the oxide film provides isolation where needed while the nitride film smooths the surface and prevents unwanted oxidation in the element region
Solution Approach 2:
The patent uses a composite insulating film structure combining two different materials - silicon oxide (or other oxide) and silicon nitride (or other nitride). The oxide layer provides effective insulation in the element isolation region, while the nitride layer provides surface smoothing and protects against thermal oxidation in the element region, achieving both isolation and surface quality
2Reliability
If a trench isolation structure is formed deeply from the surface to the substrate, then insulation between devices is achieved, but manufacturing process time and cost increase
Solution Approach 1:
Instead of forming a complete deep trench isolation structure from surface to substrate, the patent applies partial action by forming insulating films only where needed - the oxide film in the element isolation region and the nitride film over the element region. This partial approach achieves sufficient device isolation without the time-consuming process of deep trench etching
Solution Approach 2:
The patent replaces the mechanical trench isolation system (requiring deep etching) with a film-based isolation system using deposited and oxidized insulating layers. This substitution eliminates the need for deep physical trench formation while achieving equivalent or superior isolation效果, significantly reducing manufacturing time
3Device complexity
If a single insulating film material is used in both element region and element isolation region, then process simplicity is maintained, but current collapse occurs due to insufficient insulation
Solution Approach 1:
The patent applies local quality by using different insulating film materials in different regions: oxide film in the element isolation region for maximum insulation, and nitride film in the element region for surface protection and controlled insulation. This localized material selection optimizes the insulating properties for each specific region's requirements, preventing current collapse while maintaining reasonable process complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively prevents leaks between devices, reduces current collapse, and enhances the operational speed and reliability of the semiconductor device by using distinct insulating layers to manage electric resistance and parasitic capacitance.
Implementation Method 1
enhances the operational speed and reliability of the semiconductor device by using distinct insulating layers to manage electric resistance and parasitic capacitance
Implementation Method 2
effectively prevents leaks between devices, reduces current collapse
Implementation Method 3
formed using deposition techniques to prevent leaks and current collapse
Data Source
AI summary
A semiconductor device includes a switching device having: a substrate configured by a semi-insulating material or a semiconductor; a channel forming layer on the substrate that is configured by a compound semiconductor mainly having a group III nitride; a gate structure configured by a gate electrode on the channel forming layer with a gate insulating film interposed therebetween; and a source electrode and a drain electrode on the channel forming layer at both sides of the gate structure respectively, a collapse inhibiting layer on the channel forming layer in an element region of the channel forming layer where the switching device is arranged that is configured by an insulating material; and a leakage inhibiting layer on the channel forming layer in an element isolation region of the channel forming layer surrounding the element region that is configured by an insulating material different from that of the collapse inhibiting layer.