Semiconductor Device With Dual I/O Gate Insulating Films
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Solution Overview
Problem
The triple-oxide process for semiconductor devices is complex and costly due to the need for multiple steps to form transistors with different power source voltages and gate insulating film thicknesses, which complicates the fabrication process.
Innovation Solution
A semiconductor device and method that simplify the process by forming a core transistor and two I/O transistors with distinct power source voltages and gate insulating film thicknesses, where the gate insulating film thicknesses of the I/O transistors are made substantially the same, reducing the complexity and cost by integrating the formation of these films in fewer steps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a triple-oxide process is used to form gate insulating films with three different thicknesses for core transistor and two types of I/O transistors, then the power source voltages and gate insulating film thicknesses can be optimized for each transistor type, but the fabrication process becomes complex and costly
Solution Approach 1:
The patent applies local quality by forming gate insulating films with different thicknesses in different regions of the semiconductor device. Specifically, a first gate insulating film with a first thickness is formed in a first region (core transistor region), while a second gate insulating film with a second thickness is formed in a second region (I/O transistor region). This allows each region to have optimized gate insulating film thickness according to its specific requirements without requiring a complex triple-oxide process throughout the entire device.
2Adaptability or versatility
If a triple-oxide process is used to form gate insulating films with three different thicknesses, then transistors with different power source voltages can be achieved, but the fabrication cost increases
Solution Approach 1:
The patent implements local quality by creating region-specific gate insulating films with different thicknesses. The first gate insulating film with greater thickness is formed in the first region for transistors requiring higher power source voltages, while the second gate insulating film with smaller thickness is formed in the second region for transistors requiring lower power source voltages. This regional differentiation allows optimized power source voltage characteristics while avoiding the high costs associated with a triple-oxide process.
3Speed
If the gate insulating film is made thinner for high-speed operation, then the operation speed increases, but the transistor becomes more susceptible to short-channel effects
Solution Approach 1:
The patent applies local quality by forming a thinner second gate insulating film in the second region where high-speed operation is required, while maintaining a thicker first gate insulating film in the first region. The thinner gate insulating film enables higher operation speed by reducing gate delay, while the thicker gate insulating film in other regions provides better short-channel effect control. This spatial variation in gate insulating film thickness allows simultaneous optimization of speed and reliability in different device regions.
Data Source
AI summary
In a semiconductor device according to the present invention, the power source voltage Vdd1 of a core transistor Tr1, the power source voltage Vdd2 of an I/O transistor Tr2, and the power source voltage Vdd3 of an I/O transistor Tr3 satisfy Vdd1<Vdd2<Vdd3. In a method for fabricating the semiconductor device, each of the respective gate insulating films of the I/O transistors Tr2 and Tr3 is formed in the same step to have the same thickness. Each of the respective SD extension regions of the core transistor Tr1 and the I/O transistor Tr2 is formed at the same dose.