Semiconductor Pattern Density via Dual Mask Etching
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Solution Overview
Problem
In the manufacture of highly-integrated semiconductor devices, existing techniques face challenges in simultaneously forming various patterns with fine and wide-width line patterns efficiently, requiring multiple photolithographic processes and lacking a method to effectively manage pattern density and width variations.
Innovation Solution
A semiconductor device and method involving a dual mask layer process, where a mask pattern with alternating fine and wide-width line patterns is formed on a substrate, allowing for simultaneous etching of both fine and wide-width patterns using spacers, thereby reducing the need for multiple photolithographic steps and enhancing pattern density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple photolithographic processes are used to form fine patterns, then manufacturing precision is improved, but device complexity and process time increase
Solution Approach 1:
The patent merges multiple photolithographic processes into a single process by forming both fine patterns (first line patterns) and wide patterns (second line patterns) simultaneously using one mask layer. This is achieved by designing the mask pattern to include both fine and wide line patterns that are etched together in one step, eliminating the need for separate photolithographic steps for each pattern type.
Solution Approach 2:
The mask layer serves multiple functions: it defines both fine patterns and wide patterns, acts as an etch mask for both pattern types, and enables simultaneous formation of multiple pattern widths. This multi-functional approach replaces the traditional need for separate masks and processes for fine and wide patterns.
2Manufacturing precision
If multiple photolithographic processes are used to form various patterns, then manufacturing precision is improved, but productivity decreases
Solution Approach 1:
The patent combines multiple photolithographic processes into a single process by forming both fine patterns (first line patterns) and wide patterns (second line patterns) simultaneously using one mask layer. This is achieved by designing the mask pattern to include both fine and wide line patterns that are etched together in one step, eliminating the need for separate photolithographic steps for each pattern type.
Solution Approach 2:
The mask layer is designed in advance to include both fine and wide line patterns that will be formed simultaneously. The preliminary design of the mask pattern ensures that both pattern types can be created in one etching step, avoiding the need for multiple sequential processes and improving overall productivity.
3Productivity
If a single mask pattern is used to form both fine and wide patterns, then productivity is improved, but manufacturing precision may worsen
Solution Approach 1:
The mask layer is designed with different local characteristics: fine line patterns for high-precision regions and wide line patterns for broader features. Each region of the mask layer is optimized for its specific function, allowing simultaneous formation of different pattern types with appropriate precision for each application.
Solution Approach 2:
The mask layer includes both fine and wide line patterns, where the fine patterns provide the necessary precision for critical dimensions while the wide patterns provide sufficient coverage for broader features. This partial differentiation allows one mask to serve multiple precision requirements effectively.
Data Source
AI summary
Provided are a method of forming patterns for a semiconductor device in which a pattern density is doubled by performing double patterning in a part of a device region while patterns having different widths are being simultaneously formed, and a semiconductor device having a structure to which the method is easily applicable. The semiconductor device includes a plurality of line patterns extending parallel to each other in a first direction. A plurality of first line patterns are alternately selected in a second direction from among the plurality of line patterns and each have a first end existing near the first side. A plurality of second line patterns are alternately selected in the second direction from among the plurality of line patterns and each having a second end existing near the first side. The first line patterns alternate with the second line patterns and the first end of each first line pattern is farther from the first side than the second end of each second line pattern.