Semiconductor Lead Frame Dual Solder Bonding
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Solution Overview
Problem
Conventional semiconductor devices face challenges in maintaining reliable electrical connections and thermal resistance under temperature cycles due to solder thickness and tin content variations, leading to potential solder cracks and reduced bonding strength.
Innovation Solution
The method involves using a lead frame with a first solder having a higher melting point and a second solder with a lower melting point, both with specific tin content and thickness, to securely bond IGBT and diode elements, along with wires of controlled crystal grain size and Vickers hardness for enhanced bonding and thermal management.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a single solder material is used for bonding multiple semiconductor elements, then the manufacturing process is simplified, but solder cracks occur due to tin content variations and thermal expansion differences under temperature cycles
Solution Approach 1:
The patent divides the solder bonding process into two distinct stages using different solder materials: a first solder (e.g., Sn-Pb alloy) for initial bonding with high melting point, and a second solder (e.g., Sn-Cu alloy) for subsequent bonding with low melting point. This segmentation allows each solder to be optimized for its specific function, preventing tin content variations from causing cracks while maintaining manufacturing feasibility through sequential processing.
Solution Approach 2:
The patent changes the material parameters (composition, melting point, tin content) of the solder between different bonding stages. The first solder has higher melting point and controlled tin content for stable initial bonding, while the second solder has lower melting point and adjusted tin content for subsequent elements. This parameter differentiation resolves the contradiction by allowing each bonding operation to use optimally tuned material properties.
2Strength
If solder thickness is increased to improve bonding strength, then bonding strength increases, but thermal resistance increases and solder cracks are more likely to occur
Solution Approach 1:
The patent applies different solder materials with different properties to different local bonding positions. The first solder with higher melting point and specific tin content is used for the first semiconductor element bonding, while the second solder with lower melting point and adjusted composition is used for subsequent elements. This local differentiation allows each bonding interface to have optimized thickness and material properties, achieving strong bonding without excessive thermal resistance or crack susceptibility.
3Strength
If wires with fine crystal grain size are used to improve bonding strength, then bonding strength increases, but Vickers hardness increases making the wires more brittle
Solution Approach 1:
The patent optimizes the crystal grain size parameter of the wire to a specific range (3μm to 15μm) that balances bonding strength and ductility. This parameter control ensures that the wire has sufficiently fine grains for strong bonding while maintaining adequate Vickers hardness to avoid excessive brittleness. The controlled grain size prevents both weak bonding and wire fracture during assembly and operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves resistance to temperature cycles, reduces solder cracks, and maintains strong bonding between semiconductor elements and the lead frame, enhancing the reliability and durability of the semiconductor device.
Implementation Method 1
die bonding the element back surface of the first semiconductor element to the pad main surface by using a first solder; and die bonding the element back surface of the second semiconductor element to the pad main surface by using a second solder having a melting point lower than a melting point of the first solder
Data Source
AI summary
An aspect of the present disclosure provides a method of manufacturing a semiconductor device. The method includes preparing a lead frame. The lead frame includes a first lead including a pad and a first terminal. The pad includes a pad main surface and a pad back surface that face opposite sides to each other in a first direction. The first terminal extends from the pad along a second direction that is perpendicular to the first direction. The method includes: preparing a first semiconductor element and a second semiconductor element, each of the first semiconductor element and the second semiconductor element having an element main surface and an element back surface that face opposite sides to each other; die bonding the element back surface of the first semiconductor element to the pad main surface by using a first solder; and die bonding the element back surface of the second semiconductor element to the pad main surface by using a second solder having a melting point lower than a melting point of the first solder, after die bonding the element back surface of the first semiconductor element to the pad main surface by using the first solder.