Semiconductor Structure Dual Stop Layer Opening Formation
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Solution Overview
Problem
Conventional photolithographic processes in semiconductor manufacturing fail to ensure accurate formation of interconnect openings, leading to potential leakage currents due to shifting patterns and increased circuit density, resulting in undesirable semiconductor structure performance.
Innovation Solution
A method involving the use of different material stop layers, where a conductive first stop layer and an insulating second stop layer are deposited on conductive layers within a dielectric layer, with the second stop layer acting as an etching stop and improving electrical isolation, allowing for precise formation of openings and plugs to prevent leakage currents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional photolithographic process is used to form metal plugs, then the process is simple and widely applicable, but the accuracy of opening formation deteriorates due to pattern shifting and insufficient resolution for high circuit density
Solution Approach 1:
The patent segments the opening formation process into multiple steps: first forming a trench pattern, then forming a mandrel pattern, and finally using the mandrel as a template for precise opening formation. This segmentation allows each step to be optimized independently, achieving high precision without requiring advanced photolithography throughout the entire process.
Solution Approach 2:
The patent introduces a mandrel pattern as an intermediary element that serves as a precise template for opening formation. The mandrel pattern is formed with high accuracy using standard photolithography, and then used to define the final opening positions, effectively transferring precision from the mandrel formation step to the opening formation step.
2Productivity
If circuit density is increased to meet interconnect line demand, then the quantity of components increases, but the risk of leakage currents increases due to pattern shifting and reduced isolation accuracy
Solution Approach 1:
The patent performs preliminary actions by forming the mandrel pattern and first trench pattern before final opening formation. These preliminary structures serve as precise guides that ensure accurate opening positions are established before any electrical connections are made, preventing leakage currents from the outset.
Solution Approach 2:
The patent replaces direct photolithographic pattern transfer with a mechanical/template-based approach using mandrels and trenches as physical guides. This substitution ensures that opening positions are determined by physical structure rather than optical projection, eliminating pattern shifting issues and improving isolation reliability.
3Reliability
If single-layer stop layer is used in opening formation, then the process is simple, but electrical isolation between conductive layers is insufficient leading to leakage currents
Solution Approach 1:
The patent applies local quality by using different materials for different stop layers: the first stop layer uses material that provides electrical isolation, while the second stop layer uses material optimized for etching selectivity. Each layer is tailored to its specific function, achieving comprehensive electrical isolation and process control.
Solution Approach 2:
The patent employs composite material structure with multiple stop layers made of different materials. The first stop layer and second stop layer use different materials with complementary properties, combining electrical isolation capability with etching selectivity to achieve both reliability and processability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method enhances the accuracy of opening formation, reduces the risk of leakage currents, and improves the overall performance of the semiconductor structure by ensuring reliable electrical connections and isolation between conductive layers.
Implementation Method 1
forming a first opening and a second opening in the second dielectric layer by etching a portion of the second dielectric layer until the surface of the first stop layer is exposed
Data Source
AI summary
Semiconductor structure and method for forming semiconductor structure are provided. A substrate is provided, including a first dielectric layer, a first conductive layer and a second conductive layer. A first stop layer is formed on a top surface of the first conductive layer and a top surface of the second conductive layer, and a second stop layer is formed on a surface of the first dielectric layer. A second dielectric layer is formed on a surface of the first stop layer and a surface of the second stop layer. A first opening and a second opening are formed in the second dielectric layer by etching a portion of the second dielectric layer until the surface of the first stop layer is exposed. The first opening exposes the first stop layer on the first conductive layer, and the second opening exposes the first stop layer on the second conductive layer.