Semiconductor Device Dual-Thickness Electrode Stress Management

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Solution Overview

Problem

Existing semiconductor device manufacturing techniques face challenges in minimizing damage to the semiconductor substrate and wafer warping due to stress from bonding wires, as increasing the dummy cell region ratio or electrode thickness can lead to increased device size and thermal expansion issues.

Innovation Solution

A semiconductor device with a dual-thickness upper surface electrode, where a bonding wire is bonded to a thicker second thickness region, reducing stress and preventing damage, while maintaining a thinner first thickness region to prevent wafer warping, and optionally incorporating a slit portion to further mitigate warping.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If the thickness of the entire upper surface electrode is increased to relax stress in the bonded portion, then stress relaxation is improved, but the semiconductor wafer tends to warp during manufacturing steps

Engineering Contradiction:
Improvestress relaxationVSAvoidwafer warping
Core Design Contradiction:
StrengthVSStability of the object's composition

Solution Approach 1:

The upper surface electrode is designed with different thicknesses in different regions: a first thickness in the element region and a second greater thickness in the bonding region. This local variation allows the electrode to provide stress relaxation where needed (in the bonding region) while maintaining wafer stability in the element region, thereby resolving the contradiction between stress relaxation and wafer warping prevention.

Inventive Principle:
Principle #3Local quality

2Reliability

If a dummy cell region is created for bonding, then damage to the cell region is controlled, but the ratio of cell region to substrate area decreases and the device size increases

Engineering Contradiction:
Improvedamage controlVSAvoiddevice size
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The electrode thickness is locally increased only in the bonding region where the bonding wire is attached, while the element region maintains its original thinner electrode structure. This allows bonding to be performed directly on the element region without requiring a separate dummy cell region, thereby controlling damage to cells while maintaining a compact device size.

Inventive Principle:
Principle #3Local quality

3Stability of the object's composition

If the upper surface electrode has a thinner first thickness region, then wafer warping is suppressed, but stress relaxation in the bonding area is reduced

Engineering Contradiction:
Improvewafer stabilityVSAvoidstress relaxation
Core Design Contradiction:
Stability of the object's compositionVSStrength

Solution Approach 1:

The electrode is designed with spatially varying thickness: thinner in the element region to suppress wafer warping, and thicker in the bonding region to provide stress relaxation. This local differentiation allows both requirements to be satisfied simultaneously in their respective regions.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design enhances the breakdown resistance of the semiconductor device and prevents wafer warping during manufacturing by relaxing stress in the bonding area and allowing for a more compact device design.

Implementation Method 1

the second thickness region is thicker than the first thickness region, stress, generated on the second thickness region due to bonding the bonding wire, is relaxed

Methodology Applied
Scientific EffectStress relaxation: Stress Relaxation

Implementation Method 2

the thermal expansion coefficient of the upper surface electrode and that of the semiconductor substrate are different, therefore defects tend to occur

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Data Source

PatentUS8836150B2Semiconductor device
Publication Date: 2014.09.16 TOYOTA JIDOSHA KK
  • US8836150B2 patent drawing
  • US8836150B2 patent drawing
  • US8836150B2 patent drawing

AI summary

A semiconductor device disclosed in this description has a semiconductor substrate including an element region in which a semiconductor element is formed, and an upper surface electrode formed on an upper surface of the element region of the semiconductor substrate. The upper surface electrode has a first thickness region and a second thickness region which is thicker than the first thickness region, and a bonding wire is bonded on the second thickness region.