Semiconductor Device with Dual-Side Trench Gates for Voltage-Adaptive Mode Switching
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Solution Overview
Problem
Current semiconductor devices for power control, such as IGBTs and IEGTs, face limitations in controlling large currents efficiently across a wide range of collector voltages, as they either operate poorly at low voltages or have high ON resistance.
Innovation Solution
The semiconductor device incorporates a unique structure with trench gate electrodes on both emitter and collector sides, allowing for the injection of electrons and holes by controlling the gate potentials, enabling switching between MOSFET and IEGT modes to optimize current control across varying collector voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If IGBTs and IEGTs are used to control larger currents, then current control capability is improved, but ON resistance increases and performance degrades at low collector voltages
Solution Approach 1:
The patent implements dynamic mode switching between MOSFET and IEGT operations by controlling gate potentials. The semiconductor device transitions from unipolar MOSFET mode at low collector voltages to bipolar IEGT mode at high collector voltages, optimizing performance across the entire voltage range. This dynamic adaptation resolves the contradiction by selecting the appropriate conduction mode based on operating conditions.
Solution Approach 2:
The patent changes the conduction mode parameter from unipolar to bipolar operation based on collector voltage levels. By adjusting gate potentials to control carrier injection, the device switches between electron-only conduction (MOSFET) and electron-hole conduction (IEGT), thereby adapting current control characteristics to match different voltage conditions and resolve the performance degradation issue.
2Quantity of substance
If bipolar operation is used to control larger currents, then current capacity is improved, but turn-off losses increase
Solution Approach 1:
The patent dynamically selects between unipolar and bipolar modes based on operating conditions. By switching to unipolar MOSFET mode during turn-off operations when possible, the device minimizes turn-off losses while maintaining bipolar IEGT mode for high current capacity requirements, thereby resolving the contradiction between current capacity and energy loss.
Solution Approach 2:
The patent changes the conduction mode parameter to optimize the trade-off between current capacity and turn-off losses. By controlling gate potentials to switch between unipolar and bipolar operation, the device achieves high current capacity when needed while minimizing energy losses during switching operations, effectively resolving the contradiction.
3Loss of energy
If unipolar MOSFET operation is used, then turn-off losses are reduced, but current control capability is limited
Solution Approach 1:
The patent creates a universal semiconductor device that can operate in both unipolar MOSFET mode and bipolar IEGT mode by providing gate electrodes on both emitter and collector sides. This multi-functionality allows the device to achieve low turn-off losses in unipolar mode while also providing high current control capability in bipolar mode, resolving the contradiction through a single device structure that adapts to different operational requirements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances current control efficiency and reduces ON resistance, enabling stable operation across a wide range of collector voltages while minimizing turn-off losses.
Implementation Method 1
allowing for the injection of electrons and holes by controlling the gate potentials
Implementation Method 2
allowing for the injection of electrons and holes by controlling the gate potentials
Data Source
AI summary
A semiconductor device according to an embodiment includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, a third semiconductor layer of the first conductivity type, a fourth semiconductor layer of the second conductivity type, a first electrode connected to the second semiconductor layer and the fourth semiconductor layer, a second electrode facing the second semiconductor layer with an insulating film interposed, a fifth semiconductor layer of the second conductivity type, a sixth semiconductor layer of the first conductivity type, a seventh semiconductor layer of the second conductivity type, a third electrode connected to the fifth semiconductor layer and the seventh semiconductor layer, and a fourth electrode facing the fifth semiconductor layer with an insulating film interposed.


