Semiconductor Device With Dummy Bit Lines For Bias Uniformity
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Solution Overview
Problem
Existing DRAM cells with buried gates face defects due to limitations in fabrication technologies, necessitating an improved memory cell design for enhanced performance and reliability.
Innovation Solution
The semiconductor device incorporates plural dummy bit lines disposed alongside regular bit lines, with varying pitches and widths, and connected in a closed rectangular or serpent shape to avoid affecting the lithography process and allow for improved elemental arrangement, enabling electrical connection through a single plug structure and maintaining uniform bias.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dummy bit lines are disposed alongside regular bit lines with the same pitch, then the lithography process of bit lines is affected and process window deteriorates, but if dummy bit lines are added to provide uniform bias, then device complexity increases
Solution Approach 1:
The patent applies local quality by differentiating the pitch between dummy bit lines and regular bit lines. The dummy bit lines are disposed with a pitch different from that of the regular bit lines, allowing them to be formed without affecting the lithography process window of the regular bit lines. This local differentiation resolves the contradiction by enabling dummy bit lines to provide bias uniformity while maintaining manufacturing precision of the functional bit lines.
2Manufacturing precision
If dummy bit lines are formed with the same pitch as bit lines, then lithography process is compromised, but if dummy bit lines are formed with different pitch, then elemental arrangement complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the bit line structure into two distinct segments: regular bit lines with one pitch for functional operations, and dummy bit lines with a different pitch for bias uniformity. This segmentation allows each segment to be optimized independently - the regular bit lines maintain their lithography process window while the dummy bit lines provide the necessary bias uniformity, thus resolving the contradiction between manufacturing precision and device complexity.
3Reliability
If more dummy bit lines are added to improve bias uniformity, then reliability improves, but then device complexity and fabrication difficulty increase
Solution Approach 1:
The patent applies parameter changes by modifying the pitch parameter of the dummy bit lines to be different from that of the regular bit lines. This parameter differentiation enables the dummy bit lines to be formed using different lithography conditions, thereby improving bias uniformity without compromising the fabrication ease of the regular bit lines. The pitch parameter change allows the dummy structures to be integrated without increasing overall fabrication difficulty.
Data Source
AI summary
A semiconductor device includes a substrate, plural active areas, plural bit lines and plural dummy bit lines. The substrate includes a cell region and a periphery region, and the active areas are defined on the substrate. The bit lines are disposed on the substrate, within the cell region and across the active areas. The dummy bit lines are disposed at a side of the bit lines, wherein the dummy bit lines are in contact with each other and have different pitches therebetween.