Semiconductor Storage Device Dummy Cell Impurity Exusion
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The reduction in pitch between memory cells due to advanced integration levels in semiconductor storage devices leads to fabrication challenges, causing leak currents and erroneous decisions by the sense amp, even when voltages are set at median values, due to ion implantation issues between ON and OFF cells.
Innovation Solution
A semiconductor storage device is manufactured with a dummy cell adjacent to a reference cell, where impurities are implanted to exude and create a higher off-leak characteristic in the reference cell, preventing voltage reversal between memory and reference cells, even under high temperatures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the pitch between memory cells is reduced to increase integration level, then the integration density is improved, but ion implantation causes impurities to exude from ON cells to adjacent OFF cells, creating leak currents and erroneous sense amp decisions
Solution Approach 1:
A dummy cell is introduced as an intermediary structure between the ON cell and the OFF cell. The dummy cell receives ion implantation and acts as a buffer, allowing impurities to be contained within it rather than exuding into the adjacent OFF cell. This intermediary structure prevents the harmful interaction between ON and OFF cells while maintaining high integration density.
Solution Approach 2:
The ion implantation process, which normally causes harmful impurity exusion into OFF cells, is redirected to benefit the dummy cell. The dummy cell is intentionally designed to receive and contain these impurities, converting the harmful effect into a controlled feature. The dummy cell's high impurity concentration creates a potential barrier that prevents further impurity migration to adjacent OFF cells.
2Reliability
If impurity implantation is performed to create ON cells, then the ON cell conductivity is improved, but impurities exude to adjacent OFF cells causing leak currents
Solution Approach 1:
The dummy cell is designed with specific local characteristics - it is positioned adjacent to OFF cells and receives targeted ion implantation. This creates a localized region with high impurity concentration that serves as a potential barrier. The local quality of the dummy cell (high impurity concentration in a specific location) prevents impurity migration to OFF cells while maintaining ON cell conductivity.
3Measurement precision
If reference cells are used for comparison in sense amp, then data read-out accuracy is improved, but voltage reversal between memory and reference cells occurs under high temperature due to leak currents
Solution Approach 1:
The dummy cell is prepared in advance during the fabrication process, receiving ion implantation before the device operates. This beforehand action creates a potential barrier that cushions against future impurity migration, even under high temperature conditions. The dummy cell is pre-configured to prevent voltage reversal between memory and reference cells during operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces the probability of erroneous decisions during data read-out by ensuring stable voltage levels and maintaining correct differentiation between ON and OFF states, even when memory cells incur leaks.
Implementation Method 1
implanting an impurity into the dummy cell using a mask that covers the reference cell set in an OFF state; wherein the impurity is implanted so as to exude out of the dummy cell to the reference cell set in an OFF state
Data Source
AI summary
A method of manufacturing a semiconductor storage device according to an embodiment of the present invention includes forming dummy cells 611, to 618 at a position adjacent to a reference cell 412, and implanting an impurity into the dummy cells 611, to 618 using a mask that covers the reference cell 412. Here, the process of implanting the impurity is carried out so that the impurity exudes out of the dummy cells 611, to 618 to the reference cell 412.