3D Semiconductor Dummy Cells Synchronized Soft Programming

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Solution Overview

Problem

In three-dimensional semiconductor devices, thickness differences between memory layers cause variations in electric fields, leading to increased time for soft program operations due to differing electrical characteristics of top and bottom dummy cells.

Innovation Solution

Applying distinct soft program voltages to top and bottom dummy word lines during the soft program operation, with the top dummy word lines receiving a higher voltage than the bottom dummy word lines, ensures that both sets of dummy cells are threshold-voltage-increased simultaneously, thereby reducing the soft program operation time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If the same soft program voltage is applied to both top and bottom dummy word lines, then the operation is simple to control, but the soft program operation time is increased due to thickness differences causing different electrical characteristics

Engineering Contradiction:
Improvecontrol simplicityVSAvoidsoft program operation time
Core Design Contradiction:
Ease of operationVSLoss of time

Solution Approach 1:

The patent applies different soft program voltages to top and bottom dummy word lines based on their different electrical characteristics caused by thickness variations. The bottom dummy word line receives a first soft program voltage while the top dummy word line receives a second soft program voltage that is higher than the first, compensating for the thickness difference and enabling simultaneous threshold voltage increase in both regions.

Inventive Principle:
Principle #3Local quality

2Loss of time

If higher soft program voltage is applied to top dummy word line to compensate for thickness difference, then the soft program operation time is reduced, but the voltage control complexity increases

Engineering Contradiction:
Improvesoft program operation timeVSAvoidvoltage control complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent changes the voltage parameter applied to dummy word lines based on their position. Specifically, it applies a first soft program voltage to the bottom dummy word line and a second soft program voltage (higher than the first) to the top dummy word line. This parameter adjustment compensates for thickness variations and enables simultaneous threshold voltage increase in top and bottom dummy cells, reducing soft program operation time.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for synchronized soft programming of top and bottom dummy cells, reducing the overall soft program operation time and enhancing the operating speed of the semiconductor device.

Implementation Method 1

A time taken to perform a soft program operation subsequent to an erase operation may be increased due to these differences in electric fields

Methodology Applied
Scientific EffectElectric Field: Electric Field

Data Source

PatentUS10622040B2Three-dimensional semiconductor device with top dummy cells and bottom dummy cells and operating method thereof
Publication Date: 2020.04.14 SK HYNIX INC
  • US10622040B2 patent drawing
  • US10622040B2 patent drawing
  • US10622040B2 patent drawing

AI summary

Provided is a semiconductor device and an operating method thereof. The operating method of the semiconductor device includes performing a soft program operation on a top dummy cell and a bottom dummy cell, among dummy cells stacked in a vertical direction, by applying a first soft program voltage to a bottom dummy word line coupled to the bottom dummy cell and a second soft program voltage greater than the first soft program voltage to a top dummy word line coupled to the top dummy cell formed above the bottom dummy cell.