Semiconductor Dummy Conductive Patterns for Electroplating Uniformity
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Solution Overview
Problem
The existing electroplating process for forming copper wiring in semiconductor devices often results in insufficient filling of grooves, leading to defects such as voids and disconnection in wider line widths, due to non-uniform current distribution and insufficient electroplating current, especially in regions with varying line widths and shapes.
Innovation Solution
The method involves forming insulating trenches with specific configurations, including a second trench with a disconnected shape and a third trench extending to the end portions, along with a seed copper layer and barrier metal layer, to ensure uniform current distribution and sufficient copper deposition, using electroplating with controlled voltage and current application.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If electroplating is performed on grooves with varying line widths, then copper wiring can be formed in the semiconductor device, but non-uniform current distribution occurs leading to insufficient filling in wider regions
Solution Approach 1:
The patent introduces dummy conductive patterns specifically in wider line width regions to create localized current distribution optimization. These dummy patterns are positioned adjacent to the main conductive patterns and connected through conductive portions, providing additional current pathways specifically where needed without affecting narrower regions, thus achieving local quality improvement in current distribution uniformity
Solution Approach 2:
The conductive pattern is divided into main conductive pattern and dummy conductive pattern segments. The dummy conductive patterns are further segmented into multiple portions (first, second, third dummy conductive patterns) with different configurations. This segmentation allows independent optimization of current distribution in different regions, enabling better control over electroplating uniformity across varying line widths
2Quantity of substance
If electroplating current is applied to fill wider grooves, then copper deposition can be achieved, but voids and disconnection defects occur due to insufficient current distribution
Solution Approach 1:
Conductive portions act as intermediary elements connecting the dummy conductive patterns to the main conductive patterns and to each other. These conductive portions facilitate current flow from the dummy patterns into the wider groove regions, serving as current distribution mediators that ensure adequate copper deposition without creating voids or disconnections
Solution Approach 2:
The dummy conductive patterns are formed in advance during the same photolithography process as the main conductive patterns, preparing additional current pathways before the electroplating process begins. This preliminary action ensures that when electroplating occurs, the current distribution is already optimized to prevent void formation and maintain structural integrity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the formation of copper wirings with uniform thickness and reduced voids, enhancing the reliability of semiconductor devices by ensuring adequate copper filling and minimizing defects.
Implementation Method 1
the electroplating may be performed by placing the substrate into a solution including copper and then applying a voltage to an edge portion of the substrate to flow a current through the seed copper layer and to form the copper layer
Data Source
AI summary
Methods of forming conductive pattern structures form an insulating interlayer on a substrate that is partially etched to form a first trench extending to both end portions of a cell block. The insulating interlayer is also partially etched to form a second trench adjacent to the first trench, and a third trench extending to the both end portions of the cell block. The second trench has a disconnected shape at a middle portion of the cell block. A seed copper layer is formed on the insulating interlayer. Inner portions of the first, second and third trenches are electroplated with a copper layer. The copper layer is polished to expose the insulating interlayer to form first and second conductive patterns in the first and second trenches, respectively, and a first dummy conductive pattern in the third trench. Related conductive pattern structures are also described.