Semiconductor Device Dummy Conductive Rings
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Solution Overview
Problem
The existing semiconductor manufacturing processes face challenges in simplifying the fabrication of three-dimensional memory cell arrays, particularly in minimizing device size while maintaining efficient operation and reducing manufacturing complexity.
Innovation Solution
The proposed semiconductor device and manufacturing method involve a substrate with distinct regions, featuring a cell stack structure, a dummy buffer stack structure, and conductive rings, which allow for the alternation of material layers and the formation of conductive patterns to create a three-dimensional memory cell array with optimized contact plugs and pillars, enabling efficient electrical connections and reduced resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If a three-dimensional memory cell array is implemented to minimize device size, then area efficiency is improved, but manufacturing complexity increases
Solution Approach 1:
The substrate is divided into a first region for the memory cell array and a second region for peripheral circuits, with distinct stack structures in each region. The cell stack structure includes interlayer insulating layers and conductive patterns alternately stacked, while the dummy buffer stack structure includes sacrificial insulating layers and dummy interlayer insulating layers. This segmentation allows different manufacturing processes to be applied to different regions, simplifying overall manufacturing while achieving three-dimensional integration.
Solution Approach 2:
The patent transitions from planar two-dimensional memory cell arrays to three-dimensional vertically stacked memory cells. Multiple conductive patterns and insulating layers are stacked in the vertical direction to form memory cells at different heights, enabling increased storage density within the same footprint area while maintaining manufacturability through controlled deposition and etching processes.
2Area of stationary object
If peripheral circuits are integrated with memory cell arrays, then device area is reduced, but contact resistance increases
Solution Approach 1:
The peripheral contact plug is surrounded by multiple concentric dummy conductive rings at different vertical levels within the dummy buffer stack structure. These nested conductive rings create multiple parallel current paths from the peripheral circuit region to the memory cell array region, effectively reducing contact resistance through current multiplication while maintaining compact integration.
Solution Approach 2:
The dummy buffer stack structure acts as an intermediary between the peripheral circuit region and the memory cell array region. It provides a transition zone with dummy interlayer insulating layers and sacrificial insulating layers that facilitate controlled formation of contact holes and plugs, enabling low-resistance electrical connections while maintaining spatial separation of functional regions.
3Productivity
If manufacturing processes are simplified, then productivity is improved, but manufacturing precision may deteriorate
Solution Approach 1:
Sacrificial insulating layers are pre-formed in the dummy buffer stack structure before creating peripheral contact holes. Dummy interlayer insulating layers are also prepared in advance at specific vertical positions. These preliminary structures guide subsequent etching processes and material deposition, ensuring precise formation of contact holes and plugs without requiring complex real-time process control, thus maintaining precision while simplifying the overall manufacturing flow.
Data Source
AI summary
A semiconductor device includes a substrate, a cell stack structure, a channel layer, a peripheral contact plug, and first dummy conductive rings. The substrate may include a first region and a second region. The cell stack structure may include interlayer insulating layers and conductive patterns, which are alternately stacked over the first region of the substrate. The channel layer may penetrate the cell stack structure. The peripheral contact plug may extend in parallel to the channel layer over the second region of the substrate. The first dummy conductive rings may be disposed at the same levels as the conductive patterns, are spaced apart from the peripheral contact plug, and surround the peripheral contact plug.