Semiconductor Contact Structure for Etchant-Blocked Dummy Contacts

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Solution Overview

Problem

During the manufacturing process of semiconductor structures, dummy contacts in the memory device region are prone to damage due to etchant penetration during the wet etching process, which occurs when forming storage node contacts.

Innovation Solution

A semiconductor structure design where a second dummy contact composed of a dielectric layer and a conductive layer is formed between the first dummy contact and the storage node contact, with a mask layer extending downward to prevent etchant penetration and protect the first dummy contact.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a mask layer is formed to cover the dummy contact hole during wet etching, then the storage node contact hole can be etched properly, but the etchant penetrates through the interface between the mask layer and dielectric layer causing the dummy contact to be etched and damaged

Engineering Contradiction:

Improveetching precisionVSAvoiddummy contact integrity

Core Design Contradiction:

Manufacturing precisionVSReliability

Solution Approach 1:

A second dummy contact is formed between the first dummy contact and the storage node contact before the wet etching process. This second dummy contact serves as a protective barrier that prevents etchant from reaching and damaging the first dummy contact, while still allowing the etching process to proceed normally for the storage node contact hole.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The second dummy contact acts as an intermediary element between the first dummy contact and the storage node contact. It provides a physical barrier that mediates the interaction between the etchant and the first dummy contact, preventing direct contact and potential damage while maintaining the overall structure's functionality.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Reliability

If the mask layer completely covers the dummy contact hole to prevent etchant penetration, then the dummy contact is protected, but the etching process cannot be performed on the storage node contact hole

Engineering Contradiction:

Improvedummy contact protectionVSAvoidetching process feasibility

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The contact holes are segmented into different types: storage node contact holes that require etching and dummy contact holes that require protection. The second dummy contact is strategically placed to segment and isolate the first dummy contact from the etchant, allowing selective etching of storage node contacts while protecting dummy contacts.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different regions of the structure receive different treatments: the storage node contact hole region is opened for etching while the dummy contact region is protected by the second dummy contact. This local differentiation allows the mask layer to be selectively positioned, enabling etching where needed while providing protection where required.

Inventive Principle:

Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Prevents damage to the first dummy contact by effectively blocking etchant penetration, ensuring the integrity of the semiconductor structure during the etching process.

Implementation Method 1

the mask layer extends downward to the top surface of the dielectric pillar corresponding to the position of the second dummy contact to avoid the first dummy contact from being damaged in the etching process

Methodology Applied

Scientific EffectPhysical barrier blocking:

Implementation Method 2

a wet etching process is performed to remove the dielectric material in the storage node contact hole

Methodology Applied

Scientific EffectWet etching:

Data Source

PatentUS20260006779A1Semiconductor structure and manufacturing method thereof

Publication Date: 2026.01.01 POWERCHIP SEMICON MFG CORP

AI summary

A semiconductor structure and a manufacturing method thereof are provided. The semiconductor structure includes a substrate, a first dielectric layer, a storage node contact, a first dummy contact and a second dummy contact. The substrate has a memory device region and a peripheral region. The first dielectric layer is disposed on the substrate. The storage node contact is disposed in the first dielectric layer in the memory device region. The first dummy contact is disposed in the first dielectric layer in the memory device region and is adjacent to a boundary between the memory device region and the peripheral region. The second dummy contact is disposed in the first dielectric layer in the memory device region and is located between the first dummy contact and the storage node contact. The second dummy contact includes a second dielectric layer and a conductive layer located on the second dielectric layer.