Semiconductor Dummy Region Buffering Etching Impacts

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Solution Overview

Problem

The complexity of manufacturing semiconductor integrated circuits (ICs) leads to adverse impacts on electrical performance due to mutual influences between different devices on a single die, necessitating a solution to protect devices during processing.

Innovation Solution

A semiconductor structure with a dummy region and different thickness gate dielectric layers, where the dummy region acts as a buffer during etching processes to confine influences and protect other elements, ensuring improved electrical performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple devices of different kinds are integrated on one single die to increase functional density, then production efficiency and device integration are improved, but manufacturing complexity increases and devices are adversely impacted by mutual influences during processing

Engineering Contradiction:

Improveproduction efficiencyVSAvoidmanufacturing complexity

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The patent introduces a dummy structure that segments the substrate into distinct regions: a first device region, a dummy region containing the dummy structure, and a second device region. This segmentation isolates the two device regions from each other, preventing mutual influences during manufacturing processes while maintaining high functional density on the single die.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The dummy structure serves as an intermediary element positioned between the first and second device regions. During etching processes, this intermediary dummy structure absorbs or buffers the etching impacts, preventing direct adverse influences between adjacent device regions while allowing both regions to be processed on the same die.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Adaptability or versatility

If etching process is used to form layers of different thickness required by different devices, then manufacturing flexibility is improved, but other elements adjacent, near, or under the target layers are impacted

Engineering Contradiction:

Improvemanufacturing flexibilityVSAvoidetching impact on adjacent elements

Core Design Contradiction:

Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The dummy structure is positioned in advance between device regions that require different layer thicknesses. When etching processes are performed to create varying thicknesses for different devices, the dummy structure acts as a cushion or buffer that absorbs the harmful etching impacts, protecting adjacent device elements from damage while allowing the etching process to proceed with the required manufacturing flexibility.

Inventive Principle:

Principle #11Beforehand cushioning (Prior cushioning)

Data Source

PatentUS9748333B2Semiconductor structure including dummy structure and semiconductor pattern structure including dummy structure

Publication Date: 2017.08.29 UNITED MICROELECTRONICS CORP

AI summary

A semiconductor pattern structure includes a substrate, an input/output (I/O) region defined on the substrate, a core region defined on the substrate, a dummy region defined on the substrate, and a gate electrode formed on the substrate. The dummy region is formed between the I/O region and the core region. The gate electrode crosses the I/O region and covers a portion of the dummy region.