Semiconductor Fault Detection via Duplex Address Comparison
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The dual lockstep configuration in semiconductor devices cannot detect faults outside the lockstep, specifically on the path between the bus master and shared resources, such as memory, or in logic circuits, during runtime, which limits fault detection capabilities.
Innovation Solution
Incorporating a comparison circuit that compares access signals with outputs from shared resources and a circuit to hold faulty access signals, allowing for the detection and isolation of faults, and using a comparator to verify the integrity of access signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a dual lockstep configuration is used to monitor CPU operations, then reliability of the bus master is improved, but the ability to detect faults on access paths to shared resources deteriorates
Solution Approach 1:
The fault detection system is segmented into multiple independent comparison circuits, each responsible for monitoring specific signal paths. One comparison circuit monitors address signals while another monitors data signals, allowing comprehensive coverage of different access path components without requiring complete redundancy of the entire system.
Solution Approach 2:
A dedicated comparison circuit acts as an intermediary between the bus master and shared resources, monitoring access signals independently from the lockstep CPU monitoring. This intermediary component detects faults on the access path without interfering with normal CPU operations or requiring changes to the lockstep configuration.
2Device complexity
If traditional lockstep configuration is used, then device complexity is reduced, but measurement precision of access signal faults deteriorates
Solution Approach 1:
The fault detection function is extracted from the CPU core logic and implemented as a separate comparison circuit. This extracted component专门 monitors access signals to shared resources, providing precise fault detection without adding complexity to the CPU itself. The comparison circuit operates independently while sharing the same bus interface.
Solution Approach 2:
The comparison circuit performs self-verification by comparing access signals against expected values or redundant signal paths. When a fault is detected, the system automatically sets error flags without requiring external intervention, enabling precise fault detection while maintaining simple system operation through automated monitoring.
Data Source
Figure 1
Figure 2
Figure 3
AI summary
There is a need to detect faults on a path between a memory access circuit and a shared resource, faults in a logic circuit, and faults in the shared resource. A semiconductor device includes: a first memory access circuit; a second memory access circuit to check the first memory access circuit; a memory that outputs a memory address based on a first access address input from the first memory access circuit; a duplexing comparison circuit that compares the first access address with a second access address output from the second memory access circuit; a first address comparison circuit that compares the first access address with the memory address; and an error control circuit that outputs a control signal based on a comparison result from the duplexing comparison circuit and a comparison result from the first address comparison circuit.