Intermittent Semiconductor Circuit Control with Variable Duty Ratio
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Solution Overview
Problem
Existing semiconductor devices face challenges in reducing power consumption while maintaining performance, particularly in intermittent operation modes where power voltage fluctuations can lead to malfunctions.
Innovation Solution
A semiconductor device and method that utilize a first signal generation section to create an activation signal with a variable duty ratio, allowing a first processing section to perform intermittent operation, thereby reducing power consumption while maintaining circuit performance by controlling the duty ratio based on the operation frequency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the circuit operates continuously to maintain performance, then the circuit performance is maintained, but the power consumption increases
Solution Approach 1:
The patent implements intermittent operation by periodically activating and deactivating the circuit based on a clock signal. The circuit operates during specific time intervals (when the clock signal is high) and remains inactive during other intervals (when the clock signal is low), thereby reducing overall power consumption while maintaining necessary functionality during active periods.
Solution Approach 2:
The patent dynamically controls the operation state of the circuit by using a clock signal that transitions between high and low states. This dynamic control allows the circuit to adapt its operation mode based on timing requirements, enabling it to switch between active and inactive states to optimize the balance between power consumption and performance.
2Use of energy by moving object
If the circuit performs intermittent operation to reduce power consumption, then the power consumption is reduced, but power voltage fluctuations cause malfunctions
Solution Approach 1:
The patent introduces a delay circuit that generates a delayed version of the clock signal. This delayed signal is used to control the timing of power supply activation, ensuring that the power voltage is stabilized before the circuit begins operating. This preliminary action prevents power voltage fluctuations from causing malfunctions during circuit activation.
Solution Approach 2:
The patent uses a capacitor connected to the power supply to cushion against power voltage fluctuations. The capacitor stores energy and releases it during circuit activation, smoothing out voltage variations and preventing malfunctions that would otherwise occur due to sudden power voltage changes during intermittent operation transitions.
3Reliability
If capacitors are added to stabilize power voltage, then the power voltage stability is improved, but the circuit area increases
Solution Approach 1:
The patent optimizes the capacitance value to minimize the capacitor size while still achieving sufficient power voltage stabilization. By carefully selecting the capacitance parameter, the patent reduces the physical area required for the capacitor without compromising its ability to smooth power voltage fluctuations during intermittent operation.
Solution Approach 2:
The patent uses a delay circuit to activate the power supply before the circuit operates, allowing the capacitor to charge and stabilize the voltage in advance. This preliminary action reduces the required capacitance value, thereby reducing the capacitor area, while still ensuring stable power voltage when the circuit becomes active.
Data Source
AI summary
A semiconductor device includes: a first signal generation section configured to generate an activation signal having a variable duty ratio; and a first processing section configured to perform intermittent operation, based on the activation signal.


