Semiconductor Device Dynamic Gate Timing for TSN Efficiency

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Solution Overview

Problem

The Ethernet-TSN standard for in-vehicle communication systems faces inefficiencies due to the need for margins in open periods to account for latency, which leads to longer communication sequences and reduced system efficiency.

Innovation Solution

A semiconductor device and communication system that dynamically adjust the internal gate states based on measured latency times, allowing for optimized scheduling and reducing the need for excessive margins in open periods, thereby improving communication efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If margins are added to the open period to account for latency, then communication reliability is improved, but communication efficiency deteriorates due to longer communication sequences

Engineering Contradiction:
Improvecommunication reliabilityVSAvoidcommunication efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies dynamics by making the gate control flexible and adaptive. Instead of using fixed margins in the open period, the system dynamically adjusts the gate opening/closing timing based on actual measured latency values. The TSN controller measures transmission and reception latencies and uses these measurements to optimize gate timing, allowing the system to maintain reliability while improving efficiency by eliminating excessive static margins.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements feedback by measuring actual latency values during communication operations. The TSN controller measures the time from when data is output to when it is received, and uses this feedback information to adjust gate timing. This closed-loop feedback mechanism allows the system to adapt to actual communication conditions and optimize the balance between reliability and efficiency.

Inventive Principle:
Principle #23Feedback

2Reliability

If fixed open periods with margins are used, then communication security is improved by preventing data loss, but system responsiveness deteriorates due to conservative timing

Engineering Contradiction:
Improvecommunication securityVSAvoidsystem responsiveness
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The system transitions from static fixed open periods to dynamic timing based on actual latency measurements. The gate opening and closing times are adjusted dynamically according to measured transmission and reception latencies, allowing the system to respond more quickly to actual communication needs while maintaining security through adaptive timing rather than conservative fixed margins.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the timing parameters of the gate control based on measured latency values. Instead of using fixed parameter values for open period duration and margin timing, the system adjusts these parameters dynamically based on actual communication conditions, thereby improving responsiveness while maintaining security through data-driven parameter optimization.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentEP3678336B1Semiconductor device and communication system
Publication Date: 2022.05.11 RENESAS ELECTRONICS CORP
  • EP3678336B1 patent drawingFigure 1
  • EP3678336B1 patent drawingFigure 2
  • EP3678336B1 patent drawingFigure 3

AI summary

A semiconductor device capable of improving the efficiencies of communication systems is provided. The semiconductor device comprises: an open period in which reception of data or transmission is allowed; a clock generation circuit defining a close period in which transmission of data and reception are not allowed; and a TSN controller connected to the clock generation circuit and performing transmission of data or reception, wherein the TSN controller performs semiconductor device or reception at another time than open period.