Semiconductor Package With Dynamic Pad Positioning

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Solution Overview

Problem

In conventional multi-chip semiconductor packages, input/output pads are fixed at the same locations, making it difficult to interconnect them efficiently, especially as the data bandwidth increases, leading to challenges in optimizing package connections.

Innovation Solution

Incorporating a code control unit and decoding pads that enable input/output pads to be positioned at different locations on each die based on coding information, allowing for dynamic selection and optimization of pad connections across multiple chips within the same bandwidth.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If input/output pads are fixed at the same locations in conventional multi-chip packages, then manufacturing and alignment are simplified, but interconnection efficiency deteriorates as data bandwidth increases

Engineering Contradiction:
Improvepad alignment simplicityVSAvoidinterconnection efficiency
Core Design Contradiction:
Ease of manufactureVSProductivity

Solution Approach 1:

The patent applies dynamics by making the input/output pad locations variable rather than fixed. Each chip in the multi-chip package can have pads positioned at different locations based on decoding results, allowing the system to adapt pad positions to optimize interconnection efficiency for different data bandwidth requirements while maintaining manufacturing feasibility through a standardized decoding mechanism.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements local quality by allowing different chips to have different pad location configurations. Each chip can selectively position its input/output pads at optimal locations based on its specific function and connection requirements, rather than using a uniform pad layout across all chips. This localized optimization improves overall interconnection efficiency.

Inventive Principle:
Principle #3Local quality

2Productivity

If input/output pads are positioned at different locations on each die to optimize connections, then interconnection efficiency improves, but device complexity increases due to coding and decoding requirements

Engineering Contradiction:
Improveinterconnection efficiencyVSAvoidcoding and decoding structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent introduces coding and decoding pads as intermediary elements that mediate between the physical pad locations and the logical connection requirements. These intermediaries translate between the variable pad positions and the standardized connection interface, enabling efficient interconnection while managing complexity through a systematic encoding/decoding mechanism rather than requiring complex routing logic in each chip.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent utilizes parameter changes by varying the physical location parameters of input/output pads based on decoding results. The system changes the positional parameters of pads dynamically according to the specific chip configuration and connection needs, allowing optimization of interconnection efficiency without requiring fundamental changes to the package architecture or connection protocols.

Inventive Principle:
Principle #35Parameter changes

3Quantity of substance

If data bandwidth is increased in multi-chip packages, then system capacity improves, but pad interconnection difficulty increases due to fixed locations

Engineering Contradiction:
Improvedata bandwidthVSAvoidpad interconnection difficulty
Core Design Contradiction:
Quantity of substanceVSEase of operation

Solution Approach 1:

The patent applies dynamics by enabling the pad location configuration to adapt to different data bandwidth requirements. As data bandwidth increases, the system can selectively position more pads at optimal locations across multiple chips, rather than being constrained by fixed locations. This dynamic reconfiguration allows the system to scale interconnection capacity in proportion to data bandwidth requirements.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS7693003B2Semiconductor package
Publication Date: 2010.04.06 SK HYNIX INC
  • US7693003B2 patent drawing
  • US7693003B2 patent drawing
  • US7693003B2 patent drawing

AI summary

A semiconductor package facilitates package connection due to different locations of input/output pads in each interlayer die depending on coding information in a multi-chip package. The semiconductor package includes many chips. Each of the chips includes: input/output pads configured to input and output data having a given bandwidth; a decoding pad configured to receive coding information; and a code control unit configured to decode the coding information and to enable an input/output pad positioned at a specific location among the input/output pads according to the decoding result.