Semiconductor Redundancy Testing via E-Fuse Segmentation
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Solution Overview
Problem
Existing semiconductor devices face limitations in integration density due to the inability to program fuses after encapsulation, which is addressed by employing e-fuse arrays that share amplifiers, but this does not efficiently test redundancy word lines.
Innovation Solution
A semiconductor system that includes a first semiconductor device generating a test mode signal to block output data from unrepaired redundancy word lines and output data from repaired redundancy word lines, using a fuse control circuit, memory area, and I/O control circuit to compare addresses with fuse data to determine the status of word lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If e-fuse arrays are employed to improve integration density, then integration density is improved, but testing capability of redundancy word lines deteriorates
Solution Approach 1:
The patent segments the redundancy word lines into two distinct groups: repaired redundancy word lines (connected to functional memory cells) and unrepaired redundancy word lines (connected to defective memory cells). This segmentation allows the testing mechanism to differentiate between the two types and selectively output data only from repaired lines, thereby maintaining testing capability while using e-fuse arrays for high-density storage.
Solution Approach 2:
The patent introduces an intermediary testing mechanism comprising a test mode signal generator, comparison circuit, and controller. This intermediary system acts as a mediator between the e-fuse arrays and the output buffer, comparing address signals with fuse data to determine which redundancy word lines should have their data outputted. This intermediary layer enables effective testing and selection without compromising the high integration density provided by e-fuse arrays.
2Ease of manufacture
If general fuses are used to store control information, then programming is possible at wafer level, but programming becomes impossible after encapsulation
Solution Approach 1:
The patent replaces the mechanical/laser-based fuse programming method with an electrical programming mechanism using e-fuses implemented as MOS transistors. Instead of using laser beams to melt physical fuses at the wafer level, the invention uses electrical signals to change the resistance state of MOS transistor gates, enabling programmability both before and after encapsulation through electrical means alone.
Solution Approach 2:
The patent utilizes parameter changes in the electrical resistance of MOS transistors to achieve fuse functionality. By changing the resistance value between the gate terminal and source/drain terminal of the MOS transistor, the e-fuse can be electrically opened or shorted. This parameter-based approach allows flexible programming at any stage, replacing the fixed mechanical fuse structure.
3Measurement precision
If transistor size is increased or amplifiers are added to recognize e-fuse data, then data recognition accuracy is improved, but integration density deteriorates
Solution Approach 1:
The patent merges the amplifier function into the existing read circuitry shared by both normal memory cells and redundancy memory cells. Instead of adding separate amplifiers for e-fuse data recognition, the invention utilizes the same sense amplifiers that read data from memory cells, thereby achieving accurate data recognition without additional components that would reduce integration density.
Solution Approach 2:
The patent implements universal read circuitry that can read data from both normal memory cells and redundancy memory cells connected to repaired word lines. The sense amplifiers and output buffers are designed to handle data from multiple sources, eliminating the need for dedicated amplification circuits for e-fuse data and maintaining high integration density while ensuring accurate data recognition.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution allows for efficient testing of redundancy word lines by selectively outputting data from repaired lines while blocking unused redundancy word lines, thereby improving integration density and testing capabilities.
Implementation Method 1
data may be stored in the e-fuse by changing an electrical resistance value between a gate terminal and a source/drain terminal of the MOS transistor used as the e-fuse
Data Source
AI summary
A semiconductor system and semiconductor device may be provided. The semiconductor system may include a first semiconductor device configured to generate a test mode signal and configured to receive output data. The semiconductor system may include a second semiconductor device configured to enter a test mode, based on the test mode signal, and block the output data of data that is stored in redundancy memory cells connected to unrepaired redundancy word lines which are not used among redundancy word lines provided for replacing failed word lines.