Semiconductor ECC I/O Scheme for High-Speed Data Reliability

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Solution Overview

Problem

As semiconductor devices operate at increased speeds, the probability of errors during data transmission rises, necessitating reliable error correction methods to ensure data integrity, which existing technologies have not adequately addressed.

Innovation Solution

A semiconductor system and method that includes a controller and a semiconductor device, where the controller outputs write data and error codes during a write operation and receives read data and error codes during a read operation, using both internal and external error correction circuits to detect and correct errors, thereby ensuring data reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If data transmission speed is increased, then productivity is improved, but the probability of errors increases, worsening reliability

Engineering Contradiction:
Improvedata transmission speedVSAvoiddata transmission reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary action by generating error correction codes during the write operation before data transmission occurs. The controller generates ECC codes for write data and transmits them together with the data to the semiconductor device, which stores both the data and ECC codes. This preliminary error correction preparation enables rapid error correction during read operations without compromising transmission speed, thus resolving the contradiction between high productivity and reliability.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If error correction codes are generated and transmitted with data, then reliability is improved, but device complexity increases

Engineering Contradiction:
Improvedata transmission reliabilityVSAvoiderror correction system complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies merging by combining the transmission of data and error correction codes through the same input/output lines. Both write data and ECC codes are transmitted together during write operations, and both read data and ECC codes are received together during read operations. This integration eliminates the need for separate dedicated transmission channels, reducing overall system complexity while maintaining reliable error correction functionality.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If error correction is performed using stored error codes, then reliability is improved, but loss of time occurs due to additional processing

Engineering Contradiction:
Improvedata integrityVSAvoiderror correction processing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by pre-generating and storing error correction codes during the write operation. The semiconductor device stores both the write data and the corresponding ECC codes in its memory cells. During read operations, the stored ECC codes are immediately available for rapid error correction without requiring time-consuming regeneration, thus minimizing time loss while ensuring data integrity.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11681580B2Semiconductor system related to performing an error correction operation using an error correction method
Publication Date: 2023.06.20 SK HYNIX INC
  • US11681580B2 patent drawing
  • US11681580B2 patent drawing
  • US11681580B2 patent drawing

AI summary

A semiconductor system includes a controller configured to, in a write operation, output write data and a write error code through at least any one of input/output lines, and in a read operation, receive read data and a read error code through at least any one of the input/output lines and detect a failure of the input/output lines depending on whether the read data is error-corrected; and a semiconductor device configured to, in the write operation, correct an error of the write data based on the write error code, store the error-corrected write data and store the write error code, and in the read operation, correct an error of the write data based on the write error code stored in the write operation, output the error-corrected write data as the read data, and output the write error code stored in the write operation, as the read error code.