Semiconductor Edge Area Protection via Blocking Pattern
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Solution Overview
Problem
In the manufacturing of semiconductor devices, the edge area of the substrate is prone to etching during the replacement metal gate (RMG) process, leading to the formation of edge trenches that can act as defect sources when conductive materials are filled in, causing damage and defects in the semiconductor device.
Innovation Solution
A blocking pattern is formed on the edge area of the substrate using a blocking layer and a mask pattern, which is created using a negative type photoresist layer, to protect the edge area from the etching process and prevent the formation of edge trenches, ensuring that conductive materials are not deposited into these trenches during the metal gate formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the interlayer insulating layer is partially removed from the substrate by a planarization process to expose the dummy gate structure, then the dummy gate structure can be accessed for replacement, but the edge area of the substrate may also be exposed and etched off during the RMG process, forming edge trenches that become defect sources
Solution Approach 1:
The patent applies local quality by making the interlayer insulating layer selectively remain in the edge area while being removed from the pattern area. This is achieved through controlled planarization processes that differentiate treatment between edge and pattern regions, causing the insulating layer to act as a protective mask only where needed (at the edge area) while allowing access to the dummy gate structure in the pattern area for replacement
Solution Approach 2:
The patent applies preliminary action by having the interlayer insulating layer remain in the edge area before the RMG process begins. This pre-existing insulating layer structure serves as a protective barrier that prevents etching damage to the edge area during subsequent processing steps, eliminating the need for additional protective measures
2Object-affected harmful factors
If the interlayer insulating layer remains at the edge area to protect it from etching, then edge area protection is achieved, but the insulating layer may prevent proper processing and metal gate formation in the pattern area
Solution Approach 1:
The patent implements local quality by creating spatial differentiation in the interlayer insulating layer configuration: the insulating layer is selectively removed from the pattern area to enable proper metal gate formation and processing, while intentionally preserved in the edge area to provide protective masking. This localized presence/absence strategy allows each region to have the appropriate insulating layer configuration for its specific processing requirements
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The blocking pattern effectively prevents the edge area of the substrate from being etched, thereby eliminating the possibility of conductive bulk deposition into edge trenches, thus preventing defects and ensuring the integrity of the semiconductor device.
Implementation Method 1
a mask pattern, which is created using a negative type photoresist layer
Data Source
AI summary
Disclosed is a method of manufacturing semiconductor devices. A dummy gate structure is formed on a pattern area defined by an edge area of a substrate. An interlayer insulating layer pattern is formed to cover the pattern area and exposing the edge area of the substrate. A blocking pattern is formed on the interlayer insulating layer pattern such that the edge area of the substrate is covered with the blocking pattern and the pattern area of the substrate is exposed through the blocking pattern. A gate hole in the pattern area of the substrate in correspondence to the dummy gate structure, and a metal gate structure is formed in the gate hole. Accordingly, the edge area of the substrate is protected in the etching process and the deposition process of the replacement gate metal (RGM) process.