Semiconductor Edge Termination with Buried Zone for Field Control
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Solution Overview
Problem
Semiconductor components, particularly disk cell diodes, face excessive field strength peaks during turn-off processes due to positive edge bevels, leading to dynamic avalanches and variability in electrical properties, which are difficult to reproduce accurately.
Innovation Solution
A buried semiconductor zone of the second conductivity type is introduced, which reduces current density at the edge, delays dynamic avalanches, and compensates for charge carriers, while precise reproducibility is achieved through pre-coating and ion implantation techniques, and a field stop zone with a Gaussian doping profile is used to enhance static blocking capability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If a positive edge bevel is provided to widen the space charge zone, then the blocking voltage resistance is improved, but excessive field strength peaks occur at the transition between doped zones leading to device failure
Solution Approach 1:
The patent applies local quality by providing a positive edge bevel angle in the inner zone and a negative edge bevel angle in the outer zone. This creates different local geometries at different radial positions: the inner positive angle widens the space charge zone for blocking voltage resistance, while the outer negative angle reduces field strength peaks at the transition region. Each zone has optimized local properties suitable for its specific functional requirements.
2Object-affected harmful factors
If a second edge bevel with negative angle is etched to reduce field strength peaks, then excessive field strengths are mitigated, but the edge contour becomes difficult to reproduce leading to scattering of electrical properties
Solution Approach 1:
The patent segments the edge termination into distinct zones with different bevel angles. The inner zone has a positive edge bevel angle while the outer zone has a negative edge bevel angle. This segmentation allows each zone to be optimized independently for its specific function while maintaining clear boundaries between zones, improving both field strength management and manufacturing reproducibility.
3Strength
If the anode surface at the edge is larger than the cathode surface, then the blocking voltage is improved, but increased current density occurs on the cathode side leading to dynamic avalanche
Solution Approach 1:
The patent addresses the surface area imbalance by introducing a radial dimension variation through the negative edge bevel angle in the outer zone. This creates a tapered transition that effectively reduces the cathode surface area at the edge relative to the anode, balancing the current density distribution across the junction and preventing dynamic avalanche while preserving the blocking voltage capability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The buried semiconductor zone effectively prevents high charge and current densities at the edge, reducing the risk of dynamic avalanches and improving the reproducibility of electrical properties, thereby enhancing the semiconductor component's reliability and performance.
Implementation Method 1
precise reproducibility is achieved through pre-coating and ion implantation techniques
Implementation Method 2
delays dynamic avalanches, and compensates for charge carriers
Data Source
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AI summary
A semiconductor component comprising: - a semiconductor body (21) having a first side (22), a second side (23) and an edge (24), - an inner zone (27) having a basic doping of a first conduction type, - a first semiconductor zone (28, 61), which is arranged between the first side (22) and the inner zone (27) and is of the first conduction type and having a doping concentration higher than that of the inner zone (27), - a second semiconductor zone (29), which is arranged between the second side (23) and the inner zone (27) and is of a second conduction type, which is complementary to the first conduction type, having a doping concentration of higher than that of the inner zone (27), - at least one first edge chamfer extending at a first angle (30) with respect to the extension plane of the transition from the second semiconductor zone (29) to the inner zone (27) at least along the edge (24) of the second semiconductor zone (29) and the inner zone (27), wherein at least one buried semiconductor zone (41, 51, 81) of the second conduction type having a doping concentration higher than that of the inner zone (27) is provided between the first semiconductor zone (28, 61) and the inner zone (27) and extends substantially parallel to the first semiconductor zone (28, 61).