Semiconductor Contact Layout for Edge Carrier Extraction
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Solution Overview
Problem
Existing semiconductor devices face challenges in efficiently extracting carriers from contact sections in the edge sections of active areas, leading to reduced tolerance due to current concentration issues.
Innovation Solution
A semiconductor device design that includes a semiconductor layer with a first conductivity type over the active and voltage blocking areas, a semiconductor region with a second conductivity type on the top surface side of the semiconductor layer in the edge section, and a contact section with a first stripe portion and multiple connecting portions to facilitate even carrier extraction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If carriers are extracted by a contact section in an edge section, then carrier extraction is enabled, but current concentrates on the outer side making tolerance improvement difficult
Solution Approach 1:
The contact section is divided into multiple contact regions (first contact region, second contact region, third contact region) arranged in a specific pattern. This segmentation distributes the current extraction across multiple discrete areas rather than a single continuous contact, preventing current concentration and improving tolerance while maintaining effective carrier extraction.
Solution Approach 2:
Different contact regions are positioned at specific locations relative to the active area and voltage blocking area. The first contact region is in the active edge termination section, while the second and third contact regions are in the outer region, creating local variations in contact properties that optimize both carrier extraction and current distribution.
Data Source
AI summary
A semiconductor device including an active area and a voltage blocking area provided outwardly from the active area, the semiconductor device including: a semiconductor layer having a first conductivity type and provided over the active area and the voltage blocking area; a semiconductor region having a second conductivity type and provided on a top surface side of the semiconductor layer, in an edge section on the voltage blocking area side of the active area; and a contact section provided on a top surface side of the semiconductor region, wherein the contact section includes: a first stripe portion extending in a first direction along the edge section on the voltage blocking area side of the active area in a plan view; and a plurality of first connecting portions connected to the first stripe portion and separated from each other in the first direction.