Semiconductor Edge Protection Layers for Wafer Etching Integrity

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Solution Overview

Problem

In semiconductor processing, the challenge lies in producing high-quality semiconductor structures and devices with intricate patterning, where edge and bevel regions are prone to damage and excessive material loss during etching, leading to wafer breakage and reduced yield due to uneven etching rates and exposure of these regions during lithographic processes.

Innovation Solution

The formation of an edge protection layer on semiconductor substrates using bilayers of dielectric material with opposing stress characteristics, which are maintained along the exterior regions to prevent excessive material removal and damage during etching, allowing for controlled processing and reduced substrate loss.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If edge regions are exposed during lithographic processes, then processing access is improved, but edge and bevel regions suffer from excessive material loss and damage

Engineering Contradiction:
Improveprocessing accessVSAvoidmaterial loss at edge regions
Core Design Contradiction:
Ease of operationVSLoss of substance

Solution Approach 1:

A protective layer is formed on the semiconductor substrate before lithographic processing. This preliminary protective layer remains in place during etching operations, preventing excessive material loss at edge and bevel regions while allowing processing access to the substrate interior.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The protective layer is selectively removed from the interior region of the substrate while being maintained at the edge regions. This creates different material presence conditions in different areas: the interior allows full processing access while the edges retain protection against material loss and damage.

Inventive Principle:
Principle #3Local quality

2Ease of manufacture

If edge regions are exposed during etching, then trench formation is improved, but wafer breakage and substrate loss increase

Engineering Contradiction:
Improvetrench formationVSAvoidwafer integrity
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The protective layer is applied before trench formation etching. During the etching process, the protective layer remains at the edge regions, preventing the wafer from breaking while allowing trench formation to proceed in the interior region where the protective layer has been removed.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The protective layer acts as a cushioning element at the edge regions during etching operations. It absorbs and distributes mechanical stresses that would otherwise cause wafer breakage, thereby protecting substrate integrity while allowing aggressive etching in the protected interior regions.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Stability of the object's composition

If uniform dielectric layer is formed across the substrate, then material consistency is improved, but edge exclusion removal becomes difficult

Engineering Contradiction:
Improvedielectric layer uniformityVSAvoidedge exclusion removal
Core Design Contradiction:
Stability of the object's compositionVSEase of manufacture

Solution Approach 1:

The dielectric layer formation process is segmented into two distinct stages: first, a uniform dielectric layer is formed across the entire substrate including edge regions; second, the dielectric layer is selectively removed from the interior region while being maintained at the edge regions. This segmentation allows both uniform formation and selective removal.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The dielectric layer is treated differently in different regions of the substrate. In the interior region, the dielectric layer is completely removed to allow device formation. At the edge regions, the dielectric layer is maintained to provide protection. This local differentiation resolves the contradiction between uniform formation and selective removal.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively protects edge and bevel regions from etching damage, facilitating the production of ultra-thin wafers by minimizing substrate loss and preventing breakage, thereby enhancing device yield and process control.

Implementation Method 1

The bilayer of dielectric material may include a first layer of dielectric material characterized by a tensile stress. The bilayer of dielectric material may include a second layer of dielectric material characterized by a compressive stress.

Methodology Applied
Scientific EffectStress:

Data Source

PatentUS11830824B2Edge protection on semiconductor substrates
Publication Date: 2023.11.28 APPLIED MATERIALS INC
  • US11830824B2 patent drawing
  • US11830824B2 patent drawing
  • US11830824B2 patent drawing

AI summary

Exemplary methods of processing a semiconductor substrate may include forming a layer of dielectric material on the semiconductor substrate. The methods may include performing an edge exclusion removal of the layer of dielectric material. The methods may include forming a mask material on the semiconductor substrate. The mask material may contact the dielectric material at an edge region of the semiconductor substrate. The methods may include patterning an opening in the mask material overlying a first surface of the semiconductor substrate. The methods may include etching one or more trenches through the semiconductor substrate.