Semiconductor Edge Region Design for Avalanche Strength

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Solution Overview

Problem

Semiconductor devices with charge carrier compensation structures face challenges in achieving high avalanche strength and blockability due to fluctuations in dopant levels and electrical field ripples, leading to potential breakdown and device destruction.

Innovation Solution

A semiconductor device design featuring a cell field with drift zones and charge carrier compensation zones, where the edge region has a near-surface area of undoped or weakly doped conductivity and buried zones of complementary conductivity, optimized through multi-epitaxy techniques and variable lateral dopant structures to maintain grid pitch and reduce electrical field peaks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If the grid pitch of charge carrier compensation zones is reduced to increase blocking strength in the edge region, then blocking strength is improved, but manufacturing precision deteriorates due to fluctuations in photoresist dimensions and dopant distribution

Engineering Contradiction:
Improveblocking strengthVSAvoiddopant distribution uniformity
Core Design Contradiction:
StrengthVSManufacturing precision

Solution Approach 1:

The patent changes the fundamental parameter of grid pitch from variable (smaller in edge region) to uniform (same as cell field) while compensating for blocking strength requirements through other means, thereby eliminating manufacturing precision issues associated with sub-10µm patterning

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent extracts the charge carrier compensation zones from the edge region entirely, creating an edge region without such zones. This removes the source of manufacturing variability while the undoped near-surface area provides sufficient blocking strength

Inventive Principle:
Principle #2Taking out (Extraction)

2Reliability

If variable doping is used in charge carrier compensation columns to reduce electrical field peaks, then avalanche strength is improved, but blockability deteriorates due to increased electrical field ripple

Engineering Contradiction:
Improveavalanche strengthVSAvoidblockability
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The patent applies local quality by creating an undoped near-surface area specifically in the edge region, while the cell field maintains its charge carrier compensation structure. This localized differentiation allows the edge region to have reduced electrical field peaks without compromising cell field performance

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

Instead of using variable doping to reduce field peaks, the patent inverts the approach by using uniform doping combined with an undoped near-surface area. This reverses the conventional wisdom while achieving the same goal of field peak reduction

Inventive Principle:
Principle #13The other way round (Inversion)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design enhances blockability and avalanche strength while minimizing the risk of breakdown, achieving optimal on-state resistance and preventing premature device failure by maintaining a consistent dopant distribution and reducing electrical field ripples.

Implementation Method 1

The semiconductor devices described above may for example be produced by a layered building-up of a plurality of epitactically grown semiconductor layers

Methodology Applied
Scientific EffectEpitaxy: Epitaxy

Implementation Method 2

in at least some of the semiconductor layers the doping of the drift zones and/or the charge carrier compensation zones is inserted via openings in masks, for example by ion implantation

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 3

breakdown takes place in the cell field first and that it is possible, since the area of the cell field through which the current passes is greater than the area of the edge region, to run a higher current in the semiconductor device without damaging the semiconductor device

Methodology Applied
Scientific EffectAvalanche breakdown: Avalanche Breakdown

Data Source

PatentUS9312346B2Semiconductor device with a charge carrier compensation structure and method for the production of a semiconductor device
Publication Date: 2016.04.12 INFINEON TECH AUSTRIA AG
  • US9312346B2 patent drawing
  • US9312346B2 patent drawing
  • US9312346B2 patent drawing

AI summary

A semiconductor device has a cell field with drift zones of a first type of conductivity and charge carrier compensation zones of a second type of conductivity complementary to the first type. An edge region which surrounds the cell field has a higher blocking strength than the cell field, the edge region having a near-surface area which is undoped to more weakly doped than the drift zones, and beneath the near-surface area at least one buried, vertically extending complementarily doped zone is positioned.