Semiconductor Edge Seal Ring Structures for Fluorine Outgassing Protection

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Solution Overview

Problem

The existing semiconductor die structures are prone to fluorine outgassing and moisture ingress through open top seams in edge seal ring structures, leading to peeling and delamination of layers, which degrades device performance.

Innovation Solution

The semiconductor die incorporates edge seal ring structures with a composite via structure comprising a metallic material layer and a dielectric fill material portion, and slit ring structures with a silicon nitride passivation layer, to enhance protection against fluorine outgassing and moisture ingress.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If open top seam structures are used in edge seal rings, then manufacturing is simpler, but fluorine outgassing and moisture ingress occur causing delamination

Engineering Contradiction:

Improveedge seal ring fabrication simplicityVSAvoidprotection against fluorine outgassing and moisture ingress

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

The patent implements a nested structure where the metallic material layer is positioned within the edge seal ring, and the dielectric fill material portion is positioned within the metallic material layer, creating concentric protective barriers that seal the top seam while maintaining structural integrity

Inventive Principle:

Principle #7Nested doll (Nesting)

Solution Approach 2:

The patent uses composite materials by combining metallic material layer and dielectric fill material portion within the edge seal ring structure, where each material provides complementary protective functions against fluorine outgassing and moisture ingress

Inventive Principle:

Principle #40Composite materials

2Reliability

If composite via structures with metallic material layer and dielectric fill material portion are implemented, then sealing effectiveness improves, but device complexity increases

Engineering Contradiction:

Improveedge sealing effectivenessVSAvoidcomposite via structure complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the edge seal ring into distinct functional components: the metallic material layer providing primary sealing and the dielectric fill material portion providing secondary sealing and structural support, allowing each segment to be optimized for its specific function

Inventive Principle:

Principle #1Segmentation

3Reliability

If edge seal ring structures are added to prevent delamination, then reliability improves, but manufacturing complexity increases

Engineering Contradiction:

Improveprevention of peeling and delaminationVSAvoidedge seal ring structure complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent employs thin film structures for the metallic material layer and dielectric fill material portion that provide effective sealing against fluorine outgassing and moisture ingress while maintaining a compact form factor and minimizing added complexity

Inventive Principle:

Principle #30Flexible shells and thin films

Data Source

PatentUS11289388B2Semiconductor die including edge ring structures and methods for making the same

Publication Date: 2022.03.29 SANDISK TECHNOLOGIES LLC

AI summary

A semiconductor die includes semiconductor devices located over a substrate, at least one dielectric material portion that laterally surrounds the semiconductor devices, and interconnect-level dielectric material layers. At least one edge seal ring structure can be provided, each including a composite edge seal via structure and a set of metal barrier structures. The composite edge seal via structure includes a metallic material layer and a dielectric fill material portion. Alternatively or additionally, at least one slit ring structure can laterally surround the semiconductor devices and the metal interconnect structures. Each slit ring structure continuously extends through each of the interconnect-level dielectric material layers and into the at least one dielectric material portion, and includes at least one dielectric material.