Semiconductor Arrangement Edge Sealing and Attachment
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Solution Overview
Problem
Conventional semiconductor arrangements face issues with humidity and substance ingress due to open interfaces between the electrically conductive plate and encapsulation material, potentially damaging the power semiconductor devices and creating weak points for attachment, which can lead to mechanical and thermomechanical stress.
Innovation Solution
The semiconductor arrangement features an electrically conductive plate with at least one edge region free from encapsulation material, allowing for secure attachment and a sealing structure to prevent external substances from reaching the power semiconductor devices, while electrically conductive blocks and a control terminal interconnection structure enhance mechanical stability and electrical connectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If the encapsulation material completely encloses the electrically conductive plate, then the sealing against humidity and harmful substances is improved, but the attachment strength and mechanical stability deteriorate due to creating weak spots in the encapsulation material
Solution Approach 1:
The encapsulation is segmented into two distinct regions: a first region that completely encloses the electrically conductive plate for protection, and a second region that leaves the edge of the plate exposed for attachment. This segmentation allows the same encapsulation material to serve dual functions of protection and mechanical support.
Solution Approach 2:
Different regions of the encapsulation are given different qualities: the first region provides complete enclosure and protection against harmful substances, while the second region provides an exposed edge for mechanical attachment. This local differentiation of encapsulation properties resolves the contradiction between sealing and attachment strength.
2Reliability
If the encapsulation material completely encloses the electrically conductive plate, then the protection against harmful substances is improved, but the mechanical stress resistance deteriorates due to the weak spot created in the encapsulation
Solution Approach 1:
The encapsulation structure is divided into protective and attachment zones, allowing the plate edge to serve as a stress distribution point rather than creating a weak spot, thereby maintaining both protection reliability and stress resistance.
Solution Approach 2:
The exposed edge of the electrically conductive plate acts as an intermediary element between the encapsulation material and external attachment structures, distributing mechanical and thermomechanical stresses away from the encapsulation material and preventing stress concentration that would compromise protection reliability.
3Strength
If the encapsulation material leaves the edge of the electrically conductive plate exposed, then the attachment strength is improved, but the protection against harmful substances deteriorates due to the open interface
Solution Approach 1:
The encapsulation is segmented into a first region that provides complete enclosure for protection and a second region that exposes the plate edge for attachment, allowing both functions to coexist without compromising either protection or attachment strength.
Solution Approach 2:
The encapsulation provides complete enclosure locally around the plate body for protection, while deliberately leaving the edge exposed locally for attachment purposes, creating different protective qualities in different spatial locations to satisfy both protection and attachment requirements.
Data Source
AI summary
A semiconductor arrangement is provided. The semiconductor arrangement may include an electrically conductive plate having a surface, a plurality of power semiconductor devices arranged on the surface of the electrically conductive plate, wherein a first controlled terminal of each power semiconductor device of the plurality of power semiconductor devices may be electrically coupled to the electrically conductive plate, a plurality of electrically conductive blocks, wherein each electrically conductive block may be electrically coupled with a respective second controlled terminal of each power semiconductor device of the plurality of power semiconductor devices; and encapsulation material encapsulating the plurality of power semiconductor devices, wherein at least one edge region of the surface of the electrically conductive plate may be free from the encapsulation material.


